Hadi was awarded early tenure at the University of California, San Diego (UCSD), where he is an associate professor in Computer Science and Engineering. Prior to UCSD, he was an assistant professor in the School of Computer Science at the Georgia Institute of Technology from 2013 to 2017. There, he was the inaugural holder of the Catherine M. and James E. Allchin Early Career Professorship. Hadi is the founding director of the Alternative Computing Technologies (ACT) Lab, where his team is developing new technologies and cross-stack solutions to build the next generation computer systems. He is also the associate director of Center for Machine Integrated Computing and Security (MICS) at UCSD.
I am eagerly looking for students that ambitiously want to
make a difference! Please read my research statement
before contacting me.
Project PHI: System Design for Pervasive Hierarchal
Intelligence
Currently,
we are focusing on Project PHI (Pervasive Hierarchical
Intelligence), a holistic effort to provide a comprehensive
solution for making immersive machine intelligence a
reality. Our guiding principle is to retain as much
generality and automation while delivering large performance
and efficiency gains through specialization and acceleration
for a wide range of learning and intelligence workloads. As
the first milestone of Project PHI, we have developed Tabla,
which is open source and available at http://act-lab.org/artifacts/tabla/.
This cross-stack solution - spanning from programming
language to the hardware - rethinks the hardware/software
abstraction by delving into the theory of machine learning.
It leverages the insight that many learning algorithms can
be solved using stochastic gradient descent that minimizes
an objective function. The solver is fixed while the
objective function changes with the learning algorithm.Therefore,
Tabla
uses stochastic optimization as the abstraction between
hardware and software. Consequently, programmers specify the
learning algorithm by merely expressing the gradient of the
objective function in our domain specific language. Tabla
then automatically generates the synthesizable
implementation of the accelerator for scale-out FPGA
realization using a set of template designs. Real hardware
measurements show orders of magnitude higher performance and
power efficiency while the programmer only writes 60 lines
of code. These encouraging results show that rethinking the
hardware/software abstractions from an algorithmic
perspective can open new dimensions in system design for
Pervasive Hierarchical Intelligence.
Guest Performer. Concert in Dashti. Bereket UT-Austin
Middle Eastern Ensemble, Butler School of Music, The
University of Texas at Austin, Bates Concert Hall, April 2010
Tonbak (Persian goblet drum)
Daf (chained Persian frame drum)
News:
My PhD student, Jongse Park, successfully defended his dissertation. Congrats Dr. Jongse Park!
My PhD student, Amir Yazdanbakhsh, successfully defended his dissertation and officially became the first alumni of ACTLab. Congrats Dr. Amir Yazdanbakhsh!
Two of my undergraduate students, Preston Olds and Xiaoyi Cai, have been awarded the Georgia Tech President's Undergraduate Research Award (PURA) for Fall 2017.
My PhD student, Divya Mahajan won the 2017 National Center for Women & IT (NCWIT) Collegiate Award.
I have won the CoC Outstanding Junior Faculty Research Award.
We released DnnWeaver's source code, the first acceleration platform for deep neural network, and made it open
source.
Our study on the impact of 3D stacking on GPU-accelerated Deep Neural Networks has been covered in The Next Platform.
We released Tabla's source code, the first acceleration platform for machine learning, and made it open
source.
Our Tabla
paper presented in March 2016 at the IEEE Symposium on High
Performance Computer Architecture (HPCA '16) has won the
distinguished paper award.
My undergraduate student, Chenkai Shao, has won the
Georgia Tech President's Undergraduate Research Award (PURA)
in 2016.
My undergraduate student, Joon Kyung Kim, has won the
Georgia Tech President's Undergraduate Research Award (PURA)
in 2015.
Our Analog
Acceleration paper has been selected for honorable
mention in IEEE Micro Top Picks from the 2014 Computer
Architecture Conferences.
Our Analog
Acceleration paper presented in June 2014 at the
International Symposium on Computer Architecture (ISCA '14)
was nominated for consideration for CACM Research highlight.
Our team, Amir Yazdanbakhsh (CS) and Bradley Thwaites
(ECE), has won the Qualcomm
Innovation Fellowship. Only 9 teams out of 137
submissions have been selected to receive the fellowship
based on their proposals and their presentations. We
represent Georgia Institute of Technology.
The NPU
paper presented in December 2012 at the International
Symposium on Microarchitecture (MICRO '12) is selected for CACM Research Highlights.
The NPU paper
presented in December 2012 at the International Symposium on
Microarchitecture (MICRO '12) is selected for IEEE
Micro top picks from the 2012 computer architecture
conferences.
The Dark
Silicon paper presented in June 2011 at the
International Symposium on Computer Architecture (ISCA '11)
is selected for CACM
Research Highlights.
``This paper is not just a doomsday predictor.
It raises our awareness of the problem through scientific
quantification; but it should also serve as a springboard
for innovative research, especially for computer
architects. However, the architect cannot hope to invent
in a vacuum; the needed innovations will surely come, but
only by adopting a holistic, cross-layer view of the full
system-from devices, through circuits, microarchitecture,
system architecture, and the software stack." Pardip
Bose
``The last theme presents interesting
perspective on computer architecture trends by looking
back and looking forward. In ``What Is Happening to Power,
Performance, and Software?" Hadi Esmaeilzadeh et al.
analyze measured power and performance of a large variety
of processors and workloads to better understand the
combined effects and interactions of the rise of parallel
processors and managed programming languages in the past
decade. In ``Dark Silicon and the End of Multicore
Scaling," Hadi Esmaeilzadeh et al. highlight a crucial
impending problem where future multicore chips will be
power-limited to the point that an increasing fraction of
cores will have to be kept powered off ("dark") at every
new technology generation." Co-Chairs of the
selection committee
``With the availability of recent extensive and
insightful measurements done by Esmaeilzadeh et al.
[2011], we can look at the performance and energy benefits
of using SMT in single i7 core using a set of
multithreaded applications.'' Chapter three
The Power-Performance
Measurement paper presented in March 2011 at the
International Conference on Architectural Support for
Programming Languages and Operating Systems (ASPLOS '11) is
selected for CACM
Research Highlights.
``This treasure chest of data-recorded in large
tables in the ACM Digital Library in addition to this
paper-allows the authors (and the rest of us) to ask and
answer many questions based on real hardware. This
opportunity is a refreshing change from research results
based on simulation, which has dominated the literature
for the last decade." David Patterson
The Dark
Silicon paper presented in June 2011 at the
International Symposium on Computer Architecture (ISCA '11)
is profiled in
The New York Times:
``Even today, the most advanced microprocessor
chips have so many transistors that it is impractical to
supply power to all of them at the same time. So some of
the transistors are left unpowered ... The phenomenon is
known as dark silicon. As early as next year, these
advanced chips will need 21 percent of their transistors
to go dark at any one time ... And in just three more chip
generations - a little more than a half-decade - ... as
many as half of them will have to be turned off to avoid
overheating."
Our work on energy-aware disciplined approximate
computing has been covered in ACM
TechNews, GeekWire,
Engadget.