E. H. Phillips and M. Fatica, Implementing the Himeno benchmark with CUDA on GPU clusters, IEEE Intl. Sym. Parallel & Distrib. Proc. (IPDPS10), pp. 1-10 (April 2010)
N. Maruyama and T. Aoki, Optimizing Stencil Methods for Nvidia Kepler GPUs, HiStencils 2014.
Understanding the CUDA Data Parallel Threading Model A Primer, by Michael Wolfe (1 page)
- To Explore further
- D. Unat, X. Cai and S. B. Baden, Mint: Realizing CUDA performance in 3D Stencil Methods with Annotated C, ICS 2011 : 25th Intl Conf. on Supercomputing, Tucson, Arizona, May 31-June 4, 2011. (Optional)
- J. Holewinski, L.-N. Pouchet and P. Sadayappan. High-performance code generation for stencil computations on GPU architectures, Proc. 26th ACM Int.l Conf. Supercomputing (ICS ’12), pp 311-320.