This homework is worth 10% of your grade and is due on Thursday, February 19th at 8pm
This assignment should be individually.
If you have questions about this assignment post to the HW3 folder in Piazza
In class we discussed 2 approaches for implementing a 2D stencil method on GPUs, one based on 1D thread blocks (sliding rows), the other 2D thread blocks. It was said that the 1D blocks delivered slightly higher performance than 2D blocks. Explain why this is the case, offering insight into how the different data access patterns interact with the memory system.
The roofline model can illuminate application performance based on the underlying algorithm’s (and an implementation’s) arithmetic intensity, q, and hardware attributes (peak floating point rate and peak bandwidth). Derive the roofline model for the Aliev-Panfilov model discussed in class, using the kernel on slide 11, and the performance data on slides 12 and 15. Comment on whether or not the model accurately predicts performance and if not, offer an explanation. Note that the GPU is a Tesla C1060, which is a device with capability 1.3. The C1060 has 240 cores, organized into 30 8-core SM units (SM’s are a pre-cursor to Kepler’s SMX). Each double precision core provides a multiply-adder and a multiplier. The C1060 uses the same architecture as the GTX-280 GPU, which is explained in CSE Course notes from Fall 2012.
Stampede’s K20 GPU is organized differently that the C1060. Among other things, each double precision scalar core provides just a single multiply-adder. For the kernel on slide 11, how many multiply adds are there? How many multiples cannot be paired up with an add, and how many adds cannot be paired up with a multiply? In each case, we can utilize at best only 1/2 of the peak performance of the processor.