CSE 141L: Project in Computer Architecture

Summer Session 2: August 7th – September 9th, 2006 (Section ID 569484)

Vital Info

Announcements

1. Mon Aug 7 14:23:51 PDT 2006
   
   • The course web-board has been activated.
2. Tue Aug 8 14:52:48 PDT 2006
   
   • The campus computing folks have confirmed that you all should have access to the basement labs, rooms 230-240-250-260-270. You should be able to look up lab account information and the door code, here.
3. Wed Aug 9 18:37:14 PDT 2006
   
   • Wait list update: I found out today that waiting-list folks need to have their add cards handed in to the Registrar's office by Friday. Be sure to give your add card to me at tomorrow's 141L lecture, if you haven't already; you'll be able to pick them up at the "lab" section at 11am on Friday.
4. Thu Aug 10 18:50:14 PDT 2006
   
   • Project 1, program 2 update: I forgot to specify where to store the output! Store the computed word count at memory location 4, as an unsigned eight-bit integer.
   • Project 1 constraint relaxation: as an exception to the "8-bit register" rule, you may use a 16-bit accumulator, if and only if you 1) commit to an accumulator-based machine organization (i.e., no registers), and 2) still only access memory 8 bits at a time. It's probably not worth the trade-off.
5. Thu Aug 10 22:30:28 PDT 2006
   
   • If you're looking for a lab group, post to the CSE141L WebBoard ("Administrative Affairs"), where you can find other folks looking for groups.
6. Fri Aug 11 22:06:09 PDT 2006
   
   • WebBoard / waitlist account update: ACS has manually added the waitlisted students whose add cards I have signed to the WebBoard system. Everyone^(*) should have access now, to the WebBoards, to the basement labs, to LogicWorks, to everything. You can look up your account information, here. If any of these resources don't work for you, please let me know – with details (who, what, where, which computer, etc.) – so I can get the appropriate folks involved.
     (*) Two of you will have to take additional steps for access; I'll e-mail you directly.
7. Thu Aug 17 18:14:17 PDT 2006
   
   • Project 2 is out! In your timing diagrams, be sure to have LogicWorks represent large multi-bit values (register values, register numbers, etc.) as hex values, instead of individual logic waveforms. This makes the diagrams much easier to understand.
8. Tue Aug 22 22:19:00 PDT 2006
   
   • Daniel has provided a page of LogicWorks hints to help you out.
9. Mon Aug 28 14:47:39 PDT 2006
   
   • Daniel has also created LogicWorks ROM and RAM instructions, as well as a LogicWorks data RAM object holding the values from the Project 3 assignment.
10. Mon Aug 28 15:19:35 PDT 2006
    
    • Project 3 deadline extended: Project 3 is now due Thursday, September 7th. Late projects will be severely frowned upon, if they're graded at all, so do not be late.
11. Wed Aug 30 21:18:38 PDT 2006
    • This week's lab: there won't be a fourth project assigned, and Project 3 is no longer due tomorrow; we will still hold our scheduled meeting to return Project 2 and answer questions.
12. Tue Sep 5 18:20:14 PDT 2006
    • Steve will have extended office hours (tomorrow, Wednesday the 6th) from 6pm to 8pm.
13. Thu Sep 7 02:33:58 PDT 2006
    • Project 2 return: we'll be returning Project 2 at tonight's lab session. Sorry for the delay!
14. Thu Sep 7 20:23:57 PDT 2006
    • Project 2 grade boost: many reports had points deducted for missing information in response to Question 2. Some of these deductions were for missing items that weren't specified in the project assignment; we have reversed those, and added the points back on to those project scores. This affects a total of ten groups, with two to six points returned for each group. We can't post the grading specifics here, but you may inquire directly if you're curious about your project.