| CSE 140L Spring 2002 |
| Instructor: |
CK Cheng, kuan@cs.ucsd.edu, 858 534-6184
AP&M 4256 |
also check FAQ
for further info about report, grading and commonly asked questions.
Objective of this course is to introduce
digital components & provide hands-on experiences in building digital
circuits using computer aided design (CAD) software. Xilinx V2.1 program
is the primary software tool which will be used.
Check the web site of CSE140 for the office hours and lab hours
Direct email questions to margarit@cs, rdubey@cs, tweng@ucsd, cmleong@ieng9.ucsd,
l5pham@ieng9.ucsd, rhhuang@ieng9.ucsd, ecchan@ieng9 and kuan@cs
Lab Hours:
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Rishi: 3-5PM Wed
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Akis: 2-4PM Th
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Ethan: 10-12PM Mon, 10-12PM Wed
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Chris: 1-3PM Mon, 12-2PM Wed
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Lam: 10-12:30PM Tu, 1:30-4PM Fri
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Ricky: 11-12:30PM Th, 10-1:30PM Fri
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Thomas: 10PM-2:00AM, 6/2-3 (Sun)
Course work:
There will be 4 labs (computer simulations & report write-up).
Work in a group of two. One report per group.
Outlines of Lectures:
Labs:
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Lab 1
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Lab 2
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Lab 3 : Note that Xilinx system had been updated for LAB 3 by 10AM 5/14.
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Lab 4
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Exercise,
Solution
(Note that the solution of exercise 5 was actully for a 13-state counter.)
Grading
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lab 1 - (20%) combinational circuit design: ripple adder, subtractor, and mux.
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lab 2 - (20%) the specification and usage of flip-flops.
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lab 3 - (20%) finite state machine designs
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lab 4 - (20%) system design using datapath and control subsystems.
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Exam - (20%) 1130AM-1PM Monday 6/10, all topics presented in class and the materials in
lab assignments.
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