This schedule is subject to change, so check frequently
When references to the texts are cited, we use the following naming conventions:
Pacheco: An Introduction to Parallel Programming, by Peter Pacheco, Morgan Kaufmann, 2011.
Williams: C++ Concurrency in Action: Practical Multithreading, by Anthony Williams, Manning Publications, 2012. Here are the errata for the Willams text
P&H: *Computer Organization and Design: The Hardware/Software Interface, 4th Edition. by Patterson & Hennessy, Morgan Kaufmann. This book is available on-line at http://site.ebrary.com/lib/ucsd/reader.action?docID=10509203. You must have a UCSD network login (AD) to access this resource.
Here are the slides from section: https://goo.gl/tA92TA
Lecture 1: Introduction to parallel computing (1/5/16 Tue)
Lecture 2: Hardware organization; software execution models; threads Programming; performance
1/7/16 Thu
Lecture 3: Synchronization; the Mandelbrot set computation (1/12/16 Tue)
Lecture 4: Applying synchronization; finding and avoiding synchronization errors (1/14/16 Thu)
Lecture 5: Processor self scheduling; the memory hierarchy (1/19/16 Tue)
Lecture 6: Cache consistency and coherence (1/21/16 Thu)
Computer Organization and Design: The Hardware/Software Interface, Patterson & Hennessy, Morgan Kaufmann, 4th Edition, Chapter 5, §5.8 (pp. 534-8) Available electronically via the UCSD library at http://goo.gl/T52ZSV. Requires UCSD Active Directory Login.
Lecture 7: Parallel Merge, Barrier Synchronization (1/26/16 Tue)
To dig deeper into parallel merge sort, including an analysis of running time, see Chapter 27, §27.3 of Introduction to Algorithms, (3rd Ed) by Cormen, Leiserson, Rivest and Stein, a classic algorithms text. This chapter is available publicly from MIT at https://goo.gl/AtiqdP
Leiserson’s lecture slides, includes Merge Sort (MIT course CS 6.172): http://goo.gl/ECKh83
Lecture 8: OpenMP (1/28/16 Thu)
Lecture 9: OpenMP, condition variables (2/2/16 Tue)
Lecture 10: Midterm Review 2/4/16 Thu
There will be no reading quiz for today’s lecture
Midterm 2/9/16 Tue
Lecture 12: Stencil Methods and C++ atomics (2/11, Thu)
Lecture 13: The C++11 memory model; implementing synchronization (2/16, Tue)
Pacheco. Chapter 2: pp. 29-32 (§ 2.3.1)
SSE Introduction. Short introduction
The Architecture of the Nehalem Processor Nehalem-EP SMP Platforms. This processor is newer than Bang’s CPUs, but most of the SSE discussions are relevant.
Wikipedia entries on Vectorization and Streaming SIMD Extensions
Automatic Intra-Register Vectorization for the Intel Architecture, A. Bik et al., Int. J. of Parallel Programming, 30(2):65-98 (2002). DOI
Lecture 15: Floating Point Arithmetic (2/23, Tue)
Programming Massively Parallel Processors: A Hands-on Approach, by David Kirk and Wen-mei Hwu, Morgan Kaufmann Publishers (2010), Chapter 7 (Floating Point). (9 pp). Available on-line in draft form
Lecture 16: Optimizing for the memory hierarchy (2/25, Thu)
Motivation for Improving Matrix Multiplication, by Jim Demmel.
For further reading (optional): Designing fast linear algebra kernels in the presence of memory hierarchies, by Jim Demmel, UC Berkeley. (Skip the last section: Fast serial matrix multiplication algorithms)
Lecture 17: NUMA architecture and programming (3/1, Tue)
Best practices for programming with openMP on NUMA systems, by Joshua Mora. Look over the examples on slides 19-26
Lecture 18: Pipelining and Instruction Level Paralellism (3/3, Thu)
“Register Renaming,” Wikipedia. https://en.wikipedia.org/wiki/Register_renaming
Hennessy and Patterson, §C.7, pp C-70 to C-80, “Pipelining, Crosscutting Issues.”
(To probe further, read § C.1 - C.4)
Available electronically via the UCSD library at http://roger.ucsd.edu/record=b7202878~S9
UCSD Active Directory login required.
Hennessy and Patterson, Chapter 3, sect;3.1-3.4. “Instruction Level Paralelism”
Lecture 19: Graphical Processing Units (3/7, Tue)
Chapter 1, §1.1, §1.2, §1.3 (but skip §1.3.1, 1.3.3-4) dx.doi.org/10.1016/B978-0-12-417137-4.00001-0
Chapter 6, through §6.3: dx.doi.org/10.1016/B978-0-12-417137-4.00006-X
CUDA Education and Training https://developer.nvidia.com/cuda-education-training. CUDA is free for download from the developer site, but you will require appropriate hardware (i.e an NVIDIA GPU).
Lecture 20: Final exam review 3/10/16 Thu
Final
3/15/16 Tue (3:00pm to 5:59pm) WLH 2005 New