We will learn how to design and build a mini ALU circuit (control & datapath), as well as the control logic to calculate Fibonacci Numbers.

Lab 4 is described in the following PowerPoint file [PPT]. It consists of designing a complete datapath that includes an ALU that can implements multiple operations and a register file with 4 registers. Lab 4 also involves designing a controller that implements the Fibonacci sequence using the ALU and registers. See the [PPT] file for a detailed description.

Note: You are required to use busses for this lab. (See bus tutorial). You may use existing Xilinx components (adder, muxes, etc) for the ALU design.

No report for Lab 4. Live demo only on Sunday 03/13 noon-6pm.