Lab Computing Environment

For this course, you may use any of the CSE building (EBU3b) basement computer labs. During summer, the lab hours are as follows:

Mon - Fri: 7am to 7pm
Weekend: 9am to 5pm

During other times, you can still access the lab, but you will need a code to unlock the door. The code will be announced in class. You may also retrieve the code by looking up your ACS accounts here.

Assignments

Homework assignments have two parts: individual problems (required) and group problems (not required). Individual problems are to be completed strictly individually. Completing the group problems with your friends is strongly encouraged to help you prepare for quizzes and exams. Both having your questions answered, and explaining to others, are extremely valuable in the cognitive process of learning. To provide further encouragement for doing the optional problems in groups, I am offering the following arrangement:

By attending supervised group study sessions, you may change the weighting of quiz scores to be just 10% of the final grade (instead of 20%). That extra 10% will then be your grade for the group study sessions instead. The group study sessions are held during discussion section (there will be no regular discussion section--if you have questions for the TAs, please use office hours and the webboard). Be on time and participate as directed by the TAs to get credit for group study sessions. Primarily, you will be solving the group problems in groups of about 4 students. There may also be group presentations at the whiteboard, etc, as directed by the TAs. (It is not necessary to commit to attending every single group session--credit will be pro-rated based on how many of the 10 sessions you attend.)

Assignment:	Due Date:
Individual/required: Decode the following MIPS instructions into assembly language instructions: Hint: Use the MIPS Data Reference Sheet (green). The break down into groups of 4 is just for readability. a) 0000 0000 1110 1000 1001 1000 0010 0000 b) 0010 0001 0000 1001 0000 0000 1111 1111 c) 0000 1000 0000 1100 0000 0000 0000 0001 P&H: 2.3, 2.6, 2.37 (rows 1, 8, 10 of the table only) Group/optional: P&H: 2.4, 2.31, 2.37 (all rows of the table not on the individual hw) Show the stack, accumulator, and load-store assembly code for the instruction A = X*Y + Y*Z (for the stack assume there is an operation called "dup" which makes a duplicate of the top of the stack (ie pushes another copy of the top of the stack onto the stack).	Thurs Aug 10 9, at 10am. Either hand to TA at group study session, or email to TA by 10am. Email subject must be "CSE 141 HW 1". Deadline is strict because solutions posted at noon on the webboard (so you can study for the quiz Friday).
Individual/required: P&H: 4.7, 4.10, 5.8, 5.11, 5.34 Update: There are typos in 5.11. The code should be lw $rt,L($rs) addi $rs,$rs,4 Note the swap of $rs and $rt as well as adding 4. Amdahl's Law: think of a task you complete in your daily life where part of the time spent doing the task could be dramatically reduced by improvement X, and part of the time spend doing the task would not be reduced by said improvement (e.g., X = buying a better toaster, or a faster car, or ??). Assign concrete numbers to the components of the task (just make it up, e.g.--"the whole task takes 15 minutes, 5 minutes of that is unaffected and the other 10 minutes could be done 10 times faster with X...") and then use the Amdahl's Law equation to find the overall speedup with improvement X. Group/optional: 4.1, 4.2, 5.12, 5.14 5.29, 5.30 (5.12 typo in book: "...described in Exercise 12..." should be "...described in Exercise 11...") There are many more ET = IC * CPI * CT type questions in the book, keep doing them as needed until you get the hang of it. If you need the solution to one that isn't assigned, post it on the webboard and students should be helping each other to answer them. CPU Design Image: You may want to print this and use it for problems like 5.10, and this and this for 5.34.	Thurs Aug 16, same procedure as last week.
Individual: Multi-cycle: 5.29, 5.30 Pipeline: 6.2, 6.4, 6.33 Group: Multi-cycle/Exceptions: 5.51 Pipeline: 6.1, 6.17 Practice reading CS research papers: This is more of an Operating Systems paper than an Architecture paper, but helps show why understanding how things happen in hardware (in this case, the intrusive nature and high overhead of interrupts) has implications for higher-level performance. We discussed the main contributions of this paper during lecture on Friday (management of interrupts generated by network interface cards). If you don't feel like reading the whole thing, at least read Abstract, Introduction, Section 4-4.2 and Section 5-5.1. That's about 2 pages total.	Monday August 27 at the beginning of class. (but you should really do it before the midterm to study)
Individual: UPDATED (8/4/07): P&H: 7.39 Cache Simulator (description here) NOTES: The starter code has been updated (to revision 2) at 4:30p on August 28. Argument parsing has been provided in the new version, otherwise the code remains unchanged. For your cache simulator, your cache should have a write-allocate scheme. Check out the cache handout for a concise description of how caches work. Group: P&H: 7.28, 7.35 Problems 1-3 here

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