CSE 141L webpage

Summer session I 2003

Instructor: Pramod V. Argade

Tu 6:00 to 8:50 pm Center 214

Course Info

Lab 1

Slides from Lecture 2

Lab 2

Slides from Lecture 3

Lab 3

Slides from Lecture 4

Lab 4

 

Announcements:

      7/24/03 Important Details about RAM in logic works: The RAM component in logic works has a strange property that may generate bugs in your programs. When you make a RAM, at any time if the address pins going into the RAM are uknowns (X), it corrupts all the data in the RAM, Even if the WE (write enable) is off. So there are two things that need to be done to resolve this problem. First, you need to create a RAM with a Chip Enable (CE) pin. And make sure that at no point in the program do you send in an unknown address to the RAM. In a normal implementation, the address pins may have unknown values in them especially at the beginning of the program.

        7/22/03  Please make an appointment with one of the TAs for the demonstration of your completed circuit. The times will be first come first served. Also each TA will make max. of 10 appointments. Testing will take upto 30 minutes.

        7/8/03    Office hours for Wednesday and Thursday (7/9/03 and 7/10/03) will be held in APM 2444.

        7/3/03    Deadline for submission of lab1 has been extended to Thursday (7/10/03) due to July 4th holidays. Turn in the assignment in Anjum's office hours by 5:00 pm at the latest. Remember, No Late Submissions will be accepted after that.

        7/3/03     Anjum will hold his normal Friday office hours on 4th of July i.e. from 3:30 pm to 5:00 pm.

        7/1/03    Johnny's office hours are cancelled for now.