Zixuan Wang
- Computer Science and Engineering
- University of California, San Diego
Summary
I am Zixuan Wang (王子轩), a Ph.D. student at University of California San Diego. I'm advised by Prof. Jishen Zhao, and my research is mainly on memory systems. I'm also working with Prof. Steven Swanson at NVSL Lab, UCSD.
Before coming to UCSD, I got my Bachelor's degree from Zhejiang University, China, advised by Prof. Wenzhi Chen and Prof. Qingsong Shi. I did research on architecture and operating system at Architecture Lab, Zhejiang University.
Apart from research, I play table tennis and badminton. I've got a Guinness Record by participating the world's largest line dance. I also play games on PC, Switch, PS4 and PS5. I recently enjoy playing my new 3D Printer and a new rack in my closet.
Experience
STABLE Lab & NVSL Lab
Summer Intern
We evaluated performance of the GEN-Z memory prototype, and enabled GPU direct access to GEN-Z memory.
Computer Architecture Lab
I did research on operating system and computer architecture:
- We developed ZJUNIX operating system from scratch, and run it on ZJU-SoC, which is a self-implemented MIPS SoC on FPGA.
- We also developed a FPGA accelerator for High-Frquency Trading.
- Another cool project is Portable Modulized 3D Bioprinter, which earned Outstanding Prize on Challenge Cup.
Publication
Characterizing and Modeling Non-Volatile Memory Systems
Basic Performance Measurements of the Intel Optane DC Persistent Memory Module
Reliable and Flexible Large Scale Memory Network
A Modulized Portable 3D Bioprinter
Teaching
Hardware Based Computer System Comprehensive Practice
Help students to develop their own SoC (on FPGA) to support their OS.
Operating System
Help students to develop their own operating system from scratch.
Projects
LENS: A Low-Level NVRAM Profiler
- C
- Linux Kernel
- x86 Assembly
We build the first profiler that can discover the non-volatile memory on-DIMM micro-architecture.
- LENS runs in Linux kernel space.
- Micro-benchamrks are written in x86 assembly.
- LENS discovers the complex micro-architecture design of NVRAM DIMM products.
- Source code
VANS: A Validated NVRAM Simulator
- C++ 17
- Python
- R
- Cycle Accurate Simulation
We build a cycle-level NVRAM simulator and validate its performance with Intel Optane Persistent Memory, the first commercially available NVRAM product.
- VANS takes advantage of modern C++ features to simplify the code and increase the simulation performance.
- VANS performance matches the real NVRAM products.
- Automated testing for VANS prcision.
- Source code
GPU Direct Access to GEN-Z Memory
- FGPA
- GPU
- Linux
We evaluated the GEN-Z memory prototype, and developed a framework for GPU to directly access GEN-Z memory through PCIe.
- cuDF library runs 16x faster compared to indirect access through CPU.
FPGA Accelerated High-Frequency Trading
- FGPA
- Linux
- Userspace IO
- MIPS Assembly
A FPGA accelerator for high-frequency trading. We offload the decision procedure to FPGA, and forward incomming network data directly to FPGA. In this way, trading data doesn't go through NIC, PCIe, CPU, Main Memory to make a decision. It's already deployed in trading center.
- Use FPGA to accelerate network response and decision making.
- Use 10-Gigabit Ethernet for communication between FPGA and PC.
QEMU micro:bit emulator
- C
- ARM Assembly
- ARM Mbed OS
- Bootloader
micro:bit is a development board for students' programming training. It has a ARM Cortex-M0 processor, as well as many peripherals. But micro:bit developers need an emulator to help them debug the low-level code, so we made it on QEMU.
Develop:
- Implement Cortex-M0 features from QEMU's original Cortex-M3 emulator.
- Implement peripheral emulators, e.g LED matrix, timer, clock generator, random number generator, etc.
- Organize CPU Virtual Address Space with regard to micro:bit's spec.
- Disassemble and reverse engineered micro:bit's Bootloader.
- Go through ARM Mbed OS to make sure hardware emulation is correct.
- Debug with QEMU and remote GDB, on assembly code level.
Result:
- It can run unmodified micro:bit example code, written in C, Python or JavaScript.
- Best graduation thesis of computer science department, Zhejiang University, 2018.
- Source code
ZJUNIX Operating System
- Open Source
- OS Design
- Bootloader
- C
- MIPS Asm
- Linker Script
A self-designed OS from groud up, running on self-designed SoC or QEMU. We also implement the corresponding bootloader. This project serves as a sample for OS courses in Zhejiang University.
- Bootloader to load kernel from filesystem.
- Interrupt and exception.
- Buddy + Slab memory management.
- Process scheduling.
- Userspace programs: shell, ls, ps...
- FAT and ext2 filesystem.
ZJU-SoC
- Open Source
- FPGA
- Verilog
A self-designed SoC from groud up. It can run ZJUNIX as well as Arduino programs. This project serves as a sample for OS courses and Computer Hardware System courses in Zhejiang University.
- Self-implemented 5 stage pipline MIPS32 CPU on FPGA, 93 instructions, 2 level cache.
- With 512M DDR3, VGA, PS2, SD controller.
- Capable of running ZJUNIX Operating System.
- Capable of running Arduino programs, with our implementation of Arduino library.
- Teamwork with 2 other undergraduates.
Portable 3D Bioprinter
- Image Processing
- Mechanical Design
- Real-time System
- FPGA
A portable modulized 3D bioprinter that prints tissue directly on wounds. The whole device fits in a 28-inch travel case, and can be assembled in several minutes.
- Using FPGA accelerated edge detector to fulfill the real-time computing.
- Utility model patent, 201720246090.1
- The outstanding prize of Challenge Cup, Zhejiang Province.
- Top 10 Academic Projects, Zhejiang University, 2017
- Teamwork with 8 other undergraduates.
FPGA Accelerated Fluid Simulation
- Computer Graphics
- FPGA
- FPGA for calculation, PC for rendering.
- FPGA communicates with PC through ethernet.
- The second prize of Digilent Design Contest, 2017 China
For Fun
VS Code LinkerScript
- VS Code Extension
- Yaml
- Linker Script
ZJU Thesis
- LaTeX
- LaTeX template, widely used by students at Zhejiang University
- Recommended by School of Undergraduates.
Makefile Templates
- Makefile
Chinese Input Method in MIPS
- MIPS Assembly
- Keyboard Interrupt
- VGA Display
- A Chinese pinyin IM written in pure MIPS assembly, ~2000 lines of code.
- It captures keyboard input, translates english characters into pinyin, then query the GB2312 database to find a corresponding Chinese character.
- Demo picture. (The code is lost though.)
Tiger Language Compiler
- Bison
- Flex
- C++ 11/14
- Lexical analysis
- Syntax analysis
- Abstract syntax tree
- Intermediate code generator
Education
-
PhD student in CSUC San Diego2018 - Present
-
BS in CSZhejiang University2014 - 2018
Skills & Tools
Programming Language
- C/C++
- Python
- R
- Verilog
- MIPS/ARM/x86 Assembly
- Java
- Java Script
- CUDA
Others
- FPGA
- Linux Kernel
- Persistent Memroy
- Performance Profiling
- MIPS Arch
- ARM Mbed OS
Awards
-
IEEE Micro Top PicksAnnually awarded to 10~12 best computer architecture papers published in the past year, 2021
-
Best Grad ThesisBest graduation thesis among cs department, Zhejiang University, 2018
-
Annual Outstanding StudentTop 10 outstanding students among cs department, including grad and undergrad students, Zhejiang University, 2017
-
Outstanding PrizeChallenge Cup, National Undergraduate Curricular Academic Science and Technology Works Competition, Zhejiang Province China, 2017
-
Academic StarTop 1% student on academic area among cs department, Zhejiang University, 2017
-
Top 10 Academic ProjectsOur portable modulized 3D bioprinter won top 10 academic projects prize, Zhejiang University, 2017
-
DDC 2nd PrizeDigilent Design Contest, China, 2017
-
3rd PrizeAdvanced Computer Architecture Undergraduate Innovation Competition, CCF China, 2016