Renshen Wang







I am a PhD graduated from Department of Computer Science & Engineering, University of California, San Diego. My advisor is Professor C. K. Cheng. Here are my thesis and defense.

I'm interested in CAD algorithms and combinatorial optimization on VLSI systems, complexity of 3-D circuit design, low power bus architecture, and any other exciting future technologies.

iPhone Apps
  Knapsack, a little game I developed for iPhone or iPod Touch, with iPhone OS 2.2 or later.

Based on the classic knapsack problem, the objective is simplified, and easy drag-and-drop operations are used on the iPhone touch screen. Getting started is easy, but the strategy may not be simple. Check it on App Store~

Selected Publications

Physical Synthesis of Bus Matrix for High Bandwidth Low Power On-chip Communications


      Renshen Wang, Evangeline Young, Ronald Graham and Chung-Kuan Cheng.                        ACM International Symposium on Physical Design, March 14-17, 2010
Low Power Gated Bus Synthesis using Shortest-Path Steiner Graph for System-on-Chip Communications

      Renshen Wang, Nan-Chi Chou, Bill Salefski and Chung-Kuan Cheng.                        ACM/IEEE Design Automation Conference, July 26-31, 2009
On the Complexity of Graph Cuboidal Dual Problems for 3-D Floorplanning of Integrated Circuit Design
        Renshen Wang and Chung-Kuan Cheng.                                                                                    ACM Great Lakes Symposium on Very-large-scale Integration (GLSVLSI), May 10-12, 2009
Octilinear Redistributive Layer Routing in Bump Arrays
   Renshen Wang and Chung-Kuan Cheng.                                                                                  ACM Great Lakes Symposium on Very-large-scale Integration (GLSVLSI), May 10-12, 2009
Symmetrical Buffer Placement in Clock Trees for Minimal Skew Immune to Global On-chip Variations  
   Renshen Wang, Takumi Okamoto, Chung-Kuan Cheng.                                                                  IEEE International Conference on Computer Design, 2009
Representing Topological Structures for 3-D Floorplanning  
   Renshen Wang, Evangeline F. Y. Young, Chung-Kuan Cheng.                                                 IEEE International Conference on Communications, Circuits and Systems, 2009
Low Power Passive Equalizer Design for Computer Memory Links  
   Ling Zhang, Wenjian Yu, Yulei Zhang, Renshen Wang, Alina Deutsch, George A. Katopis, Daniel M. Dreps, James Buckwalter, Ernest S. Kuh, Chung-Kuan Cheng.   Hot Interconnects 2008: 51-56
3-D Floorplanning Using Labeled Tree and Dual Sequence  
   Renshen Wang, Evangeline F. Y. Young, Yi Zhu, Fan Chung Graham, Ronald Graham, and Chung-Kuan Cheng.   ACM International Symposium on Physical Design, April 12-16, 2008
Layer Minimization of Escape Routing in Area Array Packaging
   Renshen Wang, Rui Shi, Chung-Kuan Cheng.                                                                            IEEE/ACM International Conference on Computer-Aided Design, November 5-9, 2006
Campus Virtual Tour System Based on Cylindric Panorama  
   Shaomei Wu, Renshen Wang, Jiaxin Wang.                                                                                       International Conference on Virtual Systems and Multimedia, Ghent, October 2005
Buffer Space Planning for Long Interconnections  
   Renshen Wang, Sheqin Dong and Xianlong Hong.                                                                                  IEEE International Midwest Symposium on Circuits and Systems, Ohio, August 2005
An Improved P-admissible Floorplan Representation Based on Corner Block List  
   Renshen Wang, Sheqin Dong and Xianlong Hong.                                                                              IEEE/ACM Asia and South Pacific Design Automation Conference, Shanghai, January 2005

Curriculum Vitae


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