Chung-Kuan Cheng

Distinguished Professor

Department of Computer Science and Engineering,

University of California, San Diego,

La Jolla, CA 92093-0404

Address for express mail:

9500 Gilman Dr., Building EBU3 Room 2130

CSE Dept., UC San Diego, La Jolla, CA 92093-0404

Email: ckcheng at ucsd dot edu, Tel: (858) 534-6184, Fax: (858) 534-7029

Google Scholar profile of C.K. Cheng

I am a Distinguished Professor at the Department of Computer Science and Engineering and an Adjunct Professor at the Department of Electrical and Computer Engineering, the University of California, San Diego. I have served as a Senior Engineer, and Consultant at various System, Design, and Electronic Desgin Automation Companies. I got my Ph.D. from the Department of Electrical Engineering and Computer Sciences at the University of California, Berkeley in 1984.

Research Areas

A few representative papers

Publications

Patents

Photos
Star power, 2004

Annual event, 2005

Portrait, 2005

Cruising in San Diego, 1/04/2007

IBM EIP Award at EPEP, 10/29/2007
CK Cheng, 1/05/2010

Thanksgiving luncheon, 11/22/2012

Start of MEG Project, with a psychiatry legend, Arnold Mandell, 12/12/2013

UJIMA Award, 2/23/2013

Mentorship for 27 years, and keeps going, 8/30/2013

Prof. Graham's Birthday, Celebration Conference, 6/15-19/2015

Research group lunch meeting, 7/27/2016

Cadence Academic Collaboration Award, announced at ACM/IEEE DAC 2016, (photo taken 11/2/2016)

Thanksgiving luncheon, 12/3/2016

With the godfather of SPICE, Starting a new chapter of SPICE_Diego, 5/3/2017

Cadence Distinguished Lecture, 3/5/2018

Photo 1, Photo 2 , Commemoration for Prof. T.C. Hu, ACM ISPD 2018, 3/27/2018

Copper Harbor, and Lake Superior , Michigan Technological University visit, 10/5/2018,

Pavilion of Harmony Chinese University of Hong Kong, Shatin visit, 12/13/2018,

Hosting Prof. Steve Kang, the coauthor of the fourth passive component, Price Center, UC San Diego, 4/29/2019

Thanksgiving Dinner, 11/27/2019

Masked during pademic, 6/1/2021

2022 Commencement with Po-Ya Hsu, Mark Ho, and Daeyeal Lee, 6/11/2022

2022 ACM/IEEE DAC with Yucheng Wang, 7/13/2022
2022 ACM/IEEE ASPDAC Best Paper Award with Chester Holtz (Mark Ho not present) , 1/17-20/2022, photo taken 9/14/2022

Reunion with the first Ph.D. graduate, Arthur Wei, 1/11/2023. The event reminds me of our joint work on Ratio Cuts

Lunch meeting photo, while serving as the director of MS program for the Department, assisted by a wonderful program manager, Nadyne (middle), and bidding farewell to a precious student, 3/20/2023.

2023 CSE Department, Masters Program Award Ceremony, 6/9/2023.

2023 Ph.D. Commencement: (1) Uday, Yucheng, and Chester; (2) with Uday, (3), (4), (5); and (6) with Prof. Kahng and Minsoo, (Kuanjung not in the picture) 6/17/2023.

Bill & Melinda Gates Foundation, Hopes and Dreams, 8/25/2023.

NeurIPS 2024, Vancouver, Canada, with David Pan, the mastermind of DREAMPlace, 12/13/2024.

List of Books for CK Group

Book List

Released Packages and Report

Ratio Cut Package, 1989-1995

Ratio Cut Partitioning

RLC Reduction of Interconnect, 1999-2003

Y-Delta Transformation

Floorplanning of Blocks, 1999-2001

O-Tree Floorplanning

Y Architecture, 2002-2003

Physical Planning, Y-Architecture Yet another Y-Architecture

Surfliner, 2005

Distortionless Transmission Line

FPGA Interconnect Architecture Package, 2006-2008

FPGA Interconnect Architecture Synthesis for Power Minimization

Eye Diagram Prediction Package, 2006-2008

Eye Diagram Prediction with Asymmetric Transitions

Interconnect Architecture Topology Synthesis, 2006-2008

Topology Synthesis for Many Core Systems such as Supercomputers

BSIM3 model to Matlab format, 2010-2013

Reorganize BSIM3 Model to Explore Circuit Simulation Techniques: User Manual and Software Package.

Analytic Global Placement, 2019

RePlace, 2019, Github open source files: https://github.com/abk-openroad/RePlAce/
Annimation of ePlace based clustering on Adapter2 case, 2/12/2020: gif file

ePlace3D: ePlacement 3D version, (posted 2020).

3D global placement, ePlace3D for a compressed tar file.
ISPD 2016 talk slides with animation (195MB): pptx, without animation (3MB): pptx.

ROAD Project: Routing Analysis, 2019.

Incremental Detailed Routing Analysis and Optimization, 2019, ROAD site for the compressed tar file, ROAD_V1.0.tar.gz.

OpenRoad Project: Printed Circuit Board Layout Automation, 2019-

Top Level App: https://github.com/The-OpenROAD-Project/PCB-PR-App
Framework: https://github.com/The-OpenROAD-Project/KicadParser
Placement(Annealing): https://github.com/The-OpenROAD-Project/SA-PCB
Placement(analytical SVM): https://github.com/choltz95/pcb-placement/
Router: https://github.com/The-OpenROAD-Project/PcbRouter

ILP SAT Detailed Router: 2020.

Incremental Detailed Router, 2020, https://github.com/ckchengucsd/ILP-SAT-Detailed-Router

Standard Cell Library Layout Generator using SMT, 2020.

Github open source files (Jul. 22, 2020): https://github.com/ckchengucsd/SMT-based-STDCELL-Layout-Generator-for-PROBE2.0
Github open source files (Dec. 10, 2020): https://github.com/ckchengucsd/SMT-based-STDCELL-Layout-Generator
Github open source files (May 3, 2022): https://github.com/ckchengucsd/SMT-based-STDCELL-Layout-Generator-for-VFET

VLSI analytic placement initialization (ref. ISPD 2023 paper)

https://github.com/choltz95/laplacian-eigenmaps-revisited#readme (July 4, 2023)

Noise Aware Clustering (ref. SLIP 2024 paper)

https://github.com/Hikipeko/noise-aware-circuit-clustering (December 2, 2024)

Multirow Standard Cell Library Generator (ref. ISPD 2025 paper)

https://github.com/ckchengucsd/SMTCellUCSD-MH (January 27, 2025)

Honors and Awards

NCR Best Teaching Award, School of Engineering, University of California, San Diego, 1991.
IEEE Circuits and Systems Society, CAD Transactions Best Paper Awards, 1997, 2002.
IEEE Fellow, 2000.
IBM Faculty Awards, 2004, 2006, 2007.
Honorary Appointment as a Guest Professor of the Department of Computer Science & Technology, Tsinghua University, 2002-2008.
Runner Up of Best Poster Award, Research Expo, School of Engineering, UCSD, L. Zhang, High Performance Current-Mode Differential Logic, out of 51 posters in Computer Science and Engineering Dept., Feb. 23, 2007.
Best Poster Award, Research Expo, School of Engineering, UCSD, A. Shayan-Arani, X. Hu, Power Distribution Design for 3D Integration, out of 60 posters in Computer Science and Engineering Dept, Feb. 19, 2009.
Distinguished Faculty Award, UJIMA Network, UC San Diego, 2013.
Distinguished Professor, UC San Diego, 2014.
Cadence Academic Collaboration Award, 2016.
ACM/IEEE ASPDAC Prolific Author Award, 2020.
ACM/IEEE ASPDAC Best Paper Award, 2022.
ACM/IEEE ISPD Best Paper Award Candidate, 2023.

Services

Program Co-Chair, Int. Conf. on ASIC, ASICON, Oct. 2003.
Program Co-Chair, IEEE ASPDAC 2004.
Tutorial Co-Chair, IEEE ASPDAC 2005.
President 2003-2005, San Diego Chinese American Science and Engineering Association.
Tutorial Co-Chair, IEEE ASPDAC 2006.
One Day Tutorial Co-Organizer, ACM/IEEE DAC 2006.
Co-Chair, EDA Program, ICCCAS 2009.
General Chair, ACM/IEEE SLIP 2009.
UCSD Academic Senate Committee on Diversity and Equity (Member, Vice Chair, Chair, 2008-2011)
- Annual Report on Diversity and Equity, 05/25/2010
- Annual Report Presentation, pdf, ppt file, 05/25/2010
UCSD Academic Senate Committee on Faculty Welfare (Member, Chair, 2015-2018)
IEEE Transactions on Computer-Aided Design, Associate Editor, 2020-2024

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March 31, 2004