Name1:___________________________     Name2:___________________________

Name2:___________________________ 

Lab Assignment #5, Due March 12, 1999

         Due 5:00PM, to be placed under the door of AP&M'4840

Introduction: This lab consists of two parts. In the first part you will be implementing on LogicWorks the control from the "Error correction code" assignment, whose datapath was implemented in the third lab. In the second part of the experiment, you will be implementing a traffic light controller on a breadboard.

Part 1: Control for the error correction code assignment

The datapath for the 8-bit code invariant calculation is given in the following figure.

The algorithm is given as follows:

• Accumulator = 0, Counter = 1, Multiplier = Code
• Repeat 9 times
• • If the least significant bit of Multiplier is 1 and Q=1, then Accumulator = Accumulator + Counter
  • If the least significant bit of Multiplier is 0 and Q=0, then Accumulator = Accumulator - Counter
  • Shift Multiplier to the right (the least significant bit of the multiplier goes to Q), Counter = Counter + 1
• End

The control signals have been defined as in the following table, originally provided in Lab#3.  In this experiment, you will build a controller to implement this. However, this time we will modify the algorithm somewhat to ease the implementation and speed up the multiplication. The amount of speedup will depend on the multiplier input to the circuit.
 

The modifications are:

• Combine the control signals LoadI, ClearA, ResetF (since they have the same logic level for all clock cycles) and call the new signal Reset.
• Convert the clock cycles 1-18 into a loop of length 9, where each step of the loop consists of either one or two cycles depending on the value of the least significant bit of the multiplier at a particular instant.

When we incorporate the following modifications in the design we end up with the following state diagram. (Others in this state diagram refer to all remaining not explicitly specified signals.)

The state diagram has four states. The first state is the state where the circuit waits for the Begin signal. In this state, the data at the inputs of the multiplier and counter registers will be loaded to the registers continuously, the accumulator will be cleared and the flip-flop will be reset. When the Begin signal is asserted the circuit will start to add/sub and increment (shift signal) by advancing to the state S1 or S2 depending on the input signal Mul. In state S1 the counter will be added to the accumulator, which contains the current sum. In state S2, the multiplier will be shifted to the right and the FSMCnt will be incremented (FSMCnt will be incremented during the falling-edge of the clock signal). If FSMCnt < 9 (the condition FSMCnt < 9 is equivalent to that of FSMCnt != 9, in this context) the next state will be either S1 or S2 depending on the value of the Mul; otherwise, the next state will be S3. There are some state transitions which are not shown in this current state diagram. Independent of the current state, when you assert a low Begin signal at any time, the next state must be S0. In order to be able to simplify the design procedure, you can derive your next state equations without considering the Begin signal and then connecting the Begin signal to the reset inputs of the flip-flops. This way you will need to worry about one less signal when you derive your state equations.

Note: The control unit internal counter, FSMCnt, is distinct from the datapath counter, Counter.

You are supposed to design the controller as a state-based design. The overall structure of your controller design should look like the one in the following figure:

The flip-flops shown in this figure must be positive-edge triggered. Test your flip-flops before starting your design and if they are not positive-edge triggered, invert the clock before connecting the CLK inputs of the flip-flops.

In order to be able to implement the controller, you need to follow the steps given below.

1. Find out the number of flip-flops necessary. Use JK flip-flops for this design. For state encoding, use the natural binary encoding scheme (i.e. S0 = '0000', S1 = '0001', ...)
2. Derive the truth tables for the output signals and for the JK inputs of the flip-flops
3. Using simplification techniques, implement the output and input functions using the truth tables.

Part 2: Traffic Light Controller

In this part, you will implement the following traffic-light controller on breadboard:

• Four traffic lights will point in four directions, identified by the letters N, S, W, and E. Each light will go through the following sequence: green (10 seconds), yellow (3 seconds), and red (13 seconds). Furthermore, the N and S lights will always be the same color, as will the E and W lights, and the N-S lights will never be green or yellow at the same time as the E-W lights.

In this implementation, you are given a reference clock which generates a pulse every second. Using this reference generator as the input to your circuit, implement the traffic light controller on a breadboard. The control structure will look like the one in the first part of this experiment. The state flow should be as follows

• Reset Counter, N-S is green
• Wait for 10 seconds
• Reset Counter, N-S is yellow
• Wait for 3 seconds
• Reset Counter, E-W is green
• Wait for 10 seconds
• Reset Counter, E-W is yellow
• Wait for 3 seconds

Using the above given state flow, generate the state diagram and then implement the circuit corresponding to this state diagram on a breadboard. The overall structure of the traffic light controller should be as in the following figure:

 
TA Signature ________________________________________

If you do not want to spend too much time while building your circuit on breadboard, design your circuit on LogicWorks before implementing. Also while designing the circuit consider the components available in your lab kit.

 Requirements:
 For both parts of this experiment, please return your truth tables, next state functions, and output functions. For the LogicWorks part, return a printout of your implementation of the control logic. And, of course, you should submit your design file, following the standard "turnin" procedure.