Lab Assignment #2

Lab Assignment #2, Due January 29, 1999

Part 1: Two's Complement Multiplication - Booth's algorithm.

Part 2: Logic Functions

Name1:___________________________ Name2:___________________________

Name3:___________________________

Due 5:00PM, to be placed under the door of AP&M'4840

Introduction: In this lab you are asked again to complete an assignment composed of two parts. In part 1, you will build an 8-bit two's complement multiplier using Booth's algorithm. In part two, you will be given a number of logic function pairs. You have to show whether the function pairs are equivalent or not by implementing these functions and applying inputs to show the (in)equality.

In this part of the experiment, you will build a two's complement multiplier by using LogicWorks. The datapath of the design is given in the following figure.

You are supplied with the control unit. The control unit has four input signals, clock, begin, and M (shows the control unit whether to assert LoadA signal or not), and has several output signals. The output control signals are:

End: Indicates that the multiplication is completed
LoadI: loads the data connected to the inputs of Multiplier and Multiplicand registers into the registers
ClearA: Clears the contents of accumulator A
LoadA: Loads the results of the addition into accumulator A
Shift: Shifts the Accumulator and Multiplier to the right. The rightmost bit of the accumulator must be fed into the leftmost bit of the multiplier. The rightmost bit of the multiplier goes to the flip-flop F.
Add/Sub: Indicates whether the operation is addition or subtraction.
ResetF: This signal is used to reset the flip flop F in the beginning of the algorithm.

The algorithm consists of the following steps in the given order:

Load multiplier and multiplicand
Clear accumulator A
Reset flip-flop F
Repeat 7 times the following substeps (a, b, and c)
a) if the rightmost bit of the multiplier is 0 and F=1 then A = A + Multiplicand
b) if the rightmost bit of the multiplier is 1 and F=0 then A = A - Multiplicand
c) Shift A and Multiplier to the right. The rightmost bit of the multiplier goes to F
Perform once again substeps a) and b) from the previous step
The result is in A(7:0)Multiplier(7:1)

The control unit will supply you with the necessary control signals, once you assert the begin signal. What you need to do is to hook up the control signals to the datapath. The control signals provided by the Control unit are:

Cycle	End	LoadI	ClearA	LoadA	Shift	Add/Sub	ResetF
0	0	1	1	0	0	0	1
1,3,5,7,9,11,13,15	0	0	0	1/0	0	0	0
2,4,6,8,10,12,14	0	0	0	0	1	0	0
16	1	0	0	0	0	0	0

For this part, we will add 3 new components to the CSE140L library. These are the Control unit, a shift register with parallel load and synchronous reset, and an 8 bit add/subtract unit.
For the flip-flop Q you can use a D type flip-flop. In this case the Shift signal from the control will be a clock for it and ResetF will reset it.
'begin' input to the Control block in CSE140L library is low active meaning that you need to change the value of the begin input from 1 to 0 in order to start multiplication.
Shift Register Input specifications: LD: Parallel load input. The input connected to D0-7 is loaded into the register and can be observed through Q0-7. SH. The contents of the register are shifted to the right and the most significant bit becomes SI . [Q(7:0)] -> [SI:Q(7:1)]. CLR Clears the contents of the register. CLK Clock input to the register. Should always be connected to a global clock in your circuit.

Function 1

Function 2

In this part, you are given four pairs of logic functions. You need to decide whether these function pairs are equivalent or not. In order to show that the functions are not equivalent, you only need one input combination which produces different outputs. Whereas, in order to show that the functions are equivalent, you need to try all input combinations. However, we ask you to select one input combination only to demonstrate equality. The logic functions are:

1. AB + AC + CB , AC + A'C + BA'
2. C'A + C'B' + A'B , C' + A'B
3. BC' + BC + C'A , AB + A'B + AB'C'
4. CB' + C'B + A , CB' + B'C + AB

For each of the above function pairs, decide which input combination you are going to use and fill in the following table:

You need to show each function to the TAs and get their signature. However, the TAs will not provide verbal verification of the correctness of your results, but will only check that you have actually implemented the circuit. Consequently, please ensure that what you present to the TA represents your best and final effort in this part.

Signature	Equal/ Not Equal
1)
2)
3)
4)

In order to be able to implement these functions you will need AND/OR gates. However, the lab kit mostly has NAND/NOR gates. Therefore, you need to convert these AND/OR implementations into NAND/NAND or NOR/NOR implementation before actually building the circuits.

You can use the switches on the breadboard to apply the input to your circuits. Using switches is easier then changing the connection every time. Also, to observe the outputs you do not need to use the oscilloscope. You can use the LEDs, instead. There are two colored LEDs on the breadboard: RED and GREEN. One of the LEDs indicates that the output is High, while the other indicates that the output is Low. However, having neither of them active at the same time indicates that you have some possible problems with your connection. The first place to look at is the Power and Ground connections of the gates.

Requirements:
For these experiments, you need to return a report. For part 1, you need to return the printout of the circuit design in LogicWorks. Also provide a short overview of your implementation of the two's complement multiplication using Booth's algorithm. Also for Multiplier = 'F2' and Multiplicand = '87', give the intermediate values of registers A and Multiplier for each cycle as well as the final result of the multiplication. For part 2, return the signatures and the input combinations that you tried to show the (in)equality of function pairs. Also return the schematic of your implementation of the logic function in logic gate representation. Do not draw actual logic gates/pin numbers, etc. You can also return a formal proof of whether the function pairs are equal or not.