CSE140L Exercises, Winter 1998

I. Draw the schematic diagram to implement a three­input NAND circuit using three open­collector buffers and other necessary components.

II. Draw the schematic diagram of an edge­triggered flip­flop.

III. Design a debouncing circuit using a single pole double throw switch, 300 ohm resistors, and a minimal number of 2­input NOR gates. Draw the schematic diagram.

IV. Design a counter to count from 5 to 10 with a three­bit Johnson counter a 3­to­8 decoder and a minimal network of AND­OR­NOT gates. Draw the logic diagram of the whole system.