CSE 249C
Special Topic: Mixed-Signal Verification
Winter 2011University of California, San Diego
Instructor
- CK Cheng, CSE2130, ckcheng+249@ucsd.edu, tel: 858 534-6184
Schedule
- Lectures: 2:00-2:50PM, Wed, CSE3109
Goal
- We study the verification of mixed-signal designs via testing, design for testability, and circuit analysis. With the advance of VLSI technologies, a majority of chips contain mixed-signal components. Even for conventional digital chips, we have to watch devices with analog behavior such as power ground distribution networks, PLL for clocks, sense amplifiers for memory, and high speed IOs. The mixture of digital and analog signaling complicates the electronic systems. On the other hand, the digital interface provides high speed discrete test patterns for analog circuits and grasps certain characteristics of analog behavior. We will survey the test standards and techniques of various mixed-signal components.
Subjects
- ITRS Roadmap
- IEEE 1149.4 Standard, by Stephen Sunter,
- Test generation: Coherenece, windowing, sampling, digital patterns
- Analog Component Verification: ADC, DAC, PLL, Power ground networks, Interconnect, Reconfigurable analog components, Sensors
- Simulation and Sensitivity Derivation