CSE 141 - Winter 2007

CSE141 - Homework

Homeworks will be given approximately every week. They will usually be available on the webpage on Friday and due, in lecture, the next Friday.
There will be two parts to each homework assignment: required problems and recommended problems. You will submit only the required problems. The recommended problems are meant to reinforce the material and enrich your learning. While you can get full credit on homeworks doing only the required problems, to do well on quizzes and exams, you will want to do the recommended problems also.
Required problems (i.e. the ones you turn in) must be done ON YOUR OWN. You are, however, encouraged to work with others on the recommended problems (and any other problems from the book that weren't assigned).
Homeworks must be typed or clearly handwritten. Illegible/unreadable answers will receive no credit.

Please note that, unless otherwise stated, all problems are from the Patterson & Hennessy (P&H) textbook.
Remember that you should turn in only the required problems (i.e. not the recommended ones).

Problem 1: P&H 7.10
Problem 2: P&H 7.29
Note: For problem 7.10, you are asked to refer to the address stream given in problem 7.9. Please note that these addresses are word address. In order to get the byte address (which you should use instead of word addresses), just multiply by 4.

Problem 1: P&H 6.34
Problem 2: P&H 6.36
Note: For problem 6.34, memory access takes two cycles. This means that both the IF and MEM stages will be 2 cycles long (instead of the normal 1 cycle).

Problem 1: P&H 5.51
Problem 2: P&H 5.53 (Ignore the part of the problem starting: "Estimate the improvement in performance...")

Problem 1: P&H 5.44 (shown here):
This problem is similar to problem 5.32 except we would like to implement the jm (jump memory) instruction. The format is similar to load word except rt field is not used because the data loaded from memory is put in the PC instead of the target register.
Problem 2: P&H 5.55 (shown here): Show the microcode sequence for the addi instruction.

Here are links to figures 5.28 and 5.38. You can use these as part of problem 1 (aka 5.44 from the book). Note that there is an error in the book on figure 5.38. The error has been corrected on the figure that we link to.

Problem 1: P&H 5.2
Problem 2: This problem is similar to problem 5.8 from P&H except that you must implement the jal (jump and link) instruction.

Problem 1: P&H 4.7, Part a
Problem 2: P&H 4.10
Problem 3: P&H 4.22 (given here)
You are going to enhance a computer, and there are two possible improvements: either make multiply instructions run four times faster than before, or make memory access instructions run two times faster than before. You repeatedly run a program that takes 100 seconds to execute. Of this time, 20% is used for multiplication, 50% for memory access instructions, and 30% for other tasks. What will the speedup be if you improve only multiplication? What will the speedup be if you improve only memory access? What will the speedup be if both improvements are made?

Problem 1: P&H 1.54
Problem 2:
Decode the following MIPS instructions into assembly language instructions: Hint: Use the MIPS Data Reference Sheet (green).
The break down into groups of 4 is just for readability.

a) 0000 0000 1110 1000 1001 1000 0010 0000

b) 0010 0001 0000 1001 0000 0000 1111 1111

c) 0000 1000 0000 1100 0000 0000 0000 0001
Problem 3:
Show the stack, accumulator, and load-store assembly code for the instruction A = X*Y + Y*Z (for the stack assume there is an operation called "dup" which makes a duplicate of the top of the stack (ie pushes another copy of the top of the stack onto the stack).

Problem 1:
a) What addressing modes are supported by MIPS for non-branch instructions? Give a name, brief description, and an actual MIPS instruction example for each one.
b) What addressing modes are supported by MIPS for branch instructions? Give a name, brief description, and an actual MIPS instruction example for each one.
Problem 2: What are the three basic formats supported by MIPS? For each one give its name and describe it's format telling what information is stored in each bit field. Also give an example of a MIPS instruction that is of that type.
Problem 3: 1.1-1.28 (MATCHING)
Problem 4: 2.30
Problem 5: 2.32