Objective
In this lab, we will build a half-adder, a full-adder and a
4-bit adder from the full-adder. We will also build a
gray-code encoder & decoder. Please read report guidelines at the end of this document before you begin.
Part 1. Ripple Adder [25pts]
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i.
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Design a full-adder starting with a half-adder. Briefly describe the design
(how a 1/2 adder works and how putting together two 1/2 adders will make up
a full-adder, mention the sum & carry in relation to the inputs).
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ii.
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Use the enclosed full adder tutorial to build a full adder using xilinx program.
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iii.
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Build a 4-bit adder using xilinx & simulate the 4-bit adder using xilinx.
Simulate EXACTLY 8 different test cases to help demonstrate that your circuit works.
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Part 2. Construction of a Combinational Logic for the Gray-code ENCODER [25pts]
Design a combinational logic circuit that converts three-bit binary code counter
to three-bit gray-code counter (Gray Code ENCODER)
abc wxy
000 000
001 001
010 011
011 010
100 110
101 111
110 101
111 100
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i.
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Briefly describe what a gray-code encoder is.
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ii.
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Design the encoder circuit (K-map, Algebraic expression)
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iii.
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Build the gray-code encoder circuit & simulate the gray-code encoder using xilinx. Simulate all cases.
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Part 3. Construction of a Combinational Logic for the Gray-code DECODER [25pts]
wxy efg
000 000
001 001
011 010
010 011
110 100
111 101
101 110
100 111
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i.
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Briefly describe what a gray-code decoder is.
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ii.
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Design the encoder circuit (K-map, Algebraic expression, etc.)
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iii.
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Build the gray-code dncoder circuit & simulate the gray-code decoder using xilinx. Simulate all cases.
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Part 4. Multiplexer [25pts]
Build an 8:1 Mux using only 2:1 Muxes.
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i.
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Define the specification for this 8:1 Mux.
(input, output & their relationship)
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ii.
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Briefly describe how you design this circuit.
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iii.
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Build and simulate the circuit using xilinx.
Simulate EXACTLY 8 different test cases to help demonstrate that your circuit works.
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Report
To print simulation waveforms, double click "Simulate Behavioral Model" from the same window you selected "Generate Expected Simulation Results" from. You'll be able to print from the window that pops up (you may want to zoom out or do a zoom full). For simulation waveforms, please order your waveforms alphabetically. Additionally, for outputs related to each other, please use this notation. Consider the output of a 4bit adder: S3=Most significant bit, S0=Least significant bit. So, if the result was 3dec = 0011bin, your outputs should be S0=1, S1=1, S2=0, S3=0. These guidelines help expedite the grading process and are required.
Title page:
- Names of students and due date.
- Title of the lab and objective.
- A brief description of each person's contribution.
Content:
- Part 1 i, ii, iii
- Part 2 i, ii, iii
- Part 3 i, ii, iii
- Part 4 i, ii, iii
- Hint on a good report: Be descriptive but not wordy.
Think of yourself as the grader but doesn't have the hand out. The grader
should know what you did in the lab without looking at the hand out.
**Also, remember to have a short description on what test cases you used
(preferably label the test cases on the simulation print-out). Labeling
0's and 1's on your simulation timing chart will also help the grader to
identify which test cases you have used.
Grading
100pts.
90% will based on the completeness and correctness of the report. 10% will
based on the neatness, organization, and following instruction of the report
format. Please note, however, that if your report is not clear enough we
may not be able to tell that it's correct either and may grade you down
accordingly.
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