CSE 140L Digital Systems Lab Summer 2008

Announcements

7/7/08 - Please note that there is an error in the tutorial 1.  The input to the XOR gates should be tied to the input ports

Class

Fri 2:00pm - 4:50pm, WLH 2114

Course

This course covers topics in the design of digital circuits. The majority of the class is devoted to small digital design projects. This course also provides an introduction to hardware design tool called Xilinx Webpack and ModelSim.

Textbook

Not required.

Instructor

Isaac Chu, UCSD Guest Lecturer, Systems Architect
ichu@ece.ucsd.edu
Office hours: Cafe Roma @ Price Center
Mondays and Wednesdays 3:00 ~ 5:00pm

T.A.

Kwangyoon Lee
kwl002@cs.ucsd.edu
Office hours: @  EBU3b room B230 (basement)
Tuesdays and Thursdays 3:00 ~ 5:00pm, and Fridays 4:00 ~ 6:00pm

Course Plan

Week 1 : Introduction to digital design, Xilinx webpack tool, 7-segment display, hazard, gray-code encoder/decoder
Week 2 : Binary arithmetics : Adder, subtractor, carry-lookahead & carry-select adder.
Week 3 : Finite State Machine Circuits
Week 4 : CPU design & VHDL
Week 5 : Advanced topics + Final Review
Final exam: 8/2/2008 (Saturday 3pm), you are allowed to write notes in the blue book.

Grading

15 % : Lab 1
15 % : Lab 2
20 % : Lab 3
20 % : Lab 4
30 % : Final Exam

Assignments

Lab 1 (due week 2) : gray-code encoder/decoder, 7-segment display
Lab 2 (due week 3) : adder/subtractor, carry-lookahead adder & carry-select adder
Lab 3 (due week 4) : state machine circuits (counters, traffic light controlders)
Lab 4 (due week 5) : introduction to CPU design (mini-CPU)
* Lab demo should be done in any TA office hours on the due week.

Download

Webpack Download: Sorry, the files are too large.
Please go to XILINX website to download the service pack. You'll also need to download the free ModelSim. You will be asked to install the license for ModelSim in order to use it.

Tutorials

Tutorial 1
Tutorial 2
Tutorial 3