CSE 140 Components and Design Techniques for Digital Systems Summer 2008 |
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| Class |
Mon & Wed 5:00pm - 7:50pm, WLH 2208
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| Course |
The objective of this course is to introduce digital components and digital systems designs
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| Textbook |
Required. "Contemporary Logic Design", Randy H. Katz & Gaetano Borriello, 2nd edition, 2005, Prentice Hall
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| Instructor |
Isaac Chu, UCSD Guest Lecturer, Systems Architect ichu@ece.ucsd.edu Mon/Wed 3-5pm Fri 4-6pm |
| T.A. |
Raid Ayoub rayoub@cs.ucsd.edu Office hours @ EBU3B B250A Tu 9:30am-12:30, Th 9:00am - 10:30am, Fr 9:30am-11:00am |
| Course Plan |
Week 1 : Switch Networks, CMOS, Boolean Algebra, K-Maps, Multi-level Logic, Hazards
Week 2 : Nand-nand circuits, Multiplexer, PLA & PAL. ROM, RAM, Midterm #1 Week 3 : Memory Element, Latches, D-Flip flop, Registers, Counters, Flip-flop variations Week 4 : Counters, Finite State Machines, Midterm #2 Week 5 : State machine reduction, state assignment, case studies Final exam: Friday 8/1 7-10pm at WLH 2208 |
| Grading |
20 % : Assignments 25 % : Midterm 1 (7/9/08) 25 % : Midterm 2 (7/23/08) 30 % : Final Exam |
| Assignments |
Assignment #1 : Due 7/9/2008 Ch1 (1, 2) Ch2 (4, 17, 26) Ch3 (12-nand gates only, 18-abc) Ch4 (13-abc) Assignment #2 : due 7/23/2008 Ch6 (12, 13, 14, 15, 16) Ch7 (1, 20) Assignment #3 : due 8/1/2008 Ch8 (4, 6) |
| Announcements |
7/31: The room # for Saturday 7:00pm final exam for people with conflict is CSB 004. 7/17: TA Raid office hours for tomorrow only, Fridayday, will be moved to 12:30 - 2:00 pm 7/10: TA Raid office hours for today, Thursday, are canceled. Tomorrow, Friday, the TA will held office hours from 9:00 am -12:00 to compensate for that. 7/2: First day of lecture for 140L will be in WLH 2110 at 9am. Starting July 11, 140L will be in WLH 2114 at 2pm. |