CSE 140 Components and Design Techniques for Digital Systems

Summer 2006

Class

MW 6:00pm - 8:50pm, WLH 2115

Course Description

The objective of this course is to introduce digital components and digital systems designs

Textbook

Required. "Contemporary Logic Design", Randy H. Katz & Gaetano Borriello, 2nd edition, 2005, Prentice Hall

Instructor

Isaac Chu, UCSD Guest Lecturer, Systems Architect
ichu@ece.ucsd.edu
Office hours: @ S&E library study room

                     Friday 1:00 pm -5:00 pm

Teaching Assistant

Raid Ayoub:  rayoub@cs.ucsd.edu
Office hours: @ B250 A 

                     Tuesday 10:00 am –12:00 pm

 

Course Plan

Week 1 : Basic concepts of logic design, combinational logic circuits, Boolean formulas, two level logics, motivation for two level simplifications, multilevel logic, two level simplifications.
Week 2 : Multilevel logic simplifications, combinational logic technologies.
Week 3 : Sequential logic elements, timing methodologies and registers.
Week 4 : Basics of Finite state machine.

Week 5 : Efficient design of FSM and HDL  + final exam.
Final exam: Saturday 8/5 7pm at WLH 2115

Grading Policy

 20 % : Homework
 25 % : Midterm 1 (7/12/06)
 25 % : Midterm 2 (7/26/06)
 30 % : Final Exam

Homework

Homeworks (1-3)

Announcements

·          7/10:  The TA Raid will hold a discussion session to help with hw problems & midterm review on Tuesday 7/11, 5:00 pm –5:50 pm, CENTER 201

·          7/24:  The TA Raid will hold a discussion session to help with hw problems & midterm review on Tuesday 7/25, 5:00 pm –5:50 pm, CENTER 201