In order to enroll for CSE 141 and 141L, you must have completed Logic Design Courses CSE 140 and CSE140L.
By completing CSE 140L, you must have working knowledge of either LogicWorks 4 or Xilinx Foundation tools. For 141L course, we will use LogicWorks 4 to design an 8-bit processor and the TAs are familiar with this tool. You may use Xilinx tool, but TAs may not be able to help you with Xilinx tools related issues. Please contact the instructor if you are planning to use Xilinx tools.
CSE
141 Text Book:
Computer Organization and Design: The Hardware/Software Interface
Authors: David A. Patterson, John L. Hennessy
3nd Edition, ISBN 1-55860-428-6
CSE
141L Text Book:
Logic Works 4, Interactive Circuit Design Software
Capilano Computing Systems, Inc.
ISBN 0-201-32682-5
Following topics will be covered in this course
1. Instruction Set Architecture
2. Computer System Performance and Performance Metrics
3. Computer Arithmetic and Number System
4. CPU Architecture
5. Pipelining
6. Memory Hierarchy and Caches
6. Virtual Memory
CSE 141 Grading Information:
The grade will be based on following components:
· Homework: 10%
· Weekly Quizzes: 25%
· Midterm test: 25%
· Final test: 40%
Homework: Only a few randomly selected homework problems
will be graded and the complete homework grade will be based on these problems.
No late homework submissions will be accepted. Lowest homework grade will be
dropped and will not be counted in your final grade. There is no appeal on
homework, except for addition errors. No single problem will have a significant
impact on your grade.
Weekly Quizzes: Every Wednesday a 10-minute quiz will be given at the beginning of the class. Lowest
quiz grade will be dropped and will not be counted in your final grade. No
reference material will be permitted for the quizzes.
Tests: Midterm and final tests will be closed book and
no reference material (notes, etc.) will be permitted. You have the right of
appeal for grading on all tests; however, an appeal (except for scoring errors)
covers the entire test, and may result in an unfavorable judgment on another
problem. You have one week from the time the midterms are returned to make
appeals, including addition errors on your score. Check it over carefully when
you get it.
CSE 141L Grading Information:
There will be
4 lab assignments during the course. Each lab requires the submission of a
well-written lab report as well as electronic submission of specified programs
or logic design. Your grade will be entirely determined by the quality of these
lab reports and the completeness of the lab work, which the submitted work will
demonstrate. The lab reports are due on the specified date. No late submissions
are allowed.
Each lab will
be worth 100 points. Percentage weight of each lab for your grade is as
follows:
· Lab
· Lab
· Lab
· Lab
There will be no midterms and no final for the course.
You are
encouraged to work in groups. Form your own groups of from 1 to 3 people. Don't
leave the first class without forming a group. If you need help forming a
group, stay around after class and instructor/TAs will help you. Once you
establish a group, it can be changed only with the consent of the instructor.
You may
appeal grades on labs to the TA who graded them. If that does not lead to a
satisfactory resolution, you may discuss with the instructor. You have one week
from when we return the lab to appeal the grade. Logic Works is available as
follows:
· AP&M Room 2444
· Personal copies of LogicWorks
are available in the bookstore.
Academic Honesty:
Academic dishonesty will be taken seriously. If you are caught cheating, it will have serious consequences, including failing grade on the course.
It is ok to
discuss homework in groups.
The following is not permitted for the theory course:
· Looking at a completed homework of another
student.
· Referring to any reference material or someone
else’s solution during a quiz or a test.
For the lab course, work within your own group. The following is not permitted:
· Discussion of the lab assignments with someone in another group or someone who has already completed the lab, including prior quarters.
· Looking at a completed write-up of another student or group.
· Finding hardware solutions in textbooks or on the web, or anywhere else.
· Copying designs, or portions of designs from others outside your group or from previous quarters.
· Soliciting, receiving, or providing assistance to others outside your group.
· Altering timing data from Logic Works to make it appear that your design functions correctly or differently than it does.