Follow this link to the CSE 140L Webpage


CSE 140 Summer 2004 

(Mon/Wed: 5:00 - 6:20pm, Tue: 5:00 - 7:50pm,  HSS 1330)


Instructor:

Alex Orailoglu, alex@cs.ucsd.edu

Office Hours:
Wednesday 1:30 pm - 2:30 pm
Thursday 1:30 pm - 2:30 pm

AP&M 4840


Teaching Assistants

Chengmo Yang

c5yang@cs.ucsd.edu

Monday 1:00 -2:30 pm

Friday 1:00 -2:30 pm

AP&M 4819

Ming Woo-Kawaguchi

mwookawa@ieng9.ucsd.edu 

Monday 2:30 - 4:30 pm

Wednesday 2:30 - 4:30 pm

AP&M 4819

 


 

Announcements:
*
Classes start on Monday August 2nd in HSS 1330.

*Please check back frequently to see the updated announcements.

*Homework #1 and #2 are online!

*Class Notes #1, #2, #3 and #4 are online!

*Chengmo will hold a review section from 3:00pm to 4:20pm on Sep, 2nd (Thu) at AP&M 4301. 

*Ming-Woo will cancel his office hour on Wedsday. Instead, he will hold office hour from 4:30pm on Sep, 2nd (Thu) and 10:30am on Sep, 3rd (Fri) at EBU-1.

 

Handouts:

 

Class Notes:

 

Evaluation:

 

%

Midterm1

25%

Midterm2

20%

Midterm3

20%

Final

35%

Unannounced quizzes:

2.5% each

 


 

Homeworks:


Errors in the text book:

  • Fig 2.10 part C: excess 1032 should be excess 1023
  • Fig. 3.3: xi, yi -> si delay should be 7.6, NOT 7.2
  • Fig. 3.4 xi, yi -> ci+1 delay should be 3.2, NOT 4.2
  • Fig. 3.5 AOI 3-wide, 2-inputs, marked delay on the schematic should be 2.2 not 2.0 Consequently all 4.4 ns delay paths in summary should also be 4.6
  • Page 144, QM tables, subcubes (8,9) should be 1 0 0 _ instead of _ 0 0 1. Similarly, subcubes 9,13 and 13,15 have the same mistakes of wrong placement of the dash
  • Table 5.2: The delays marked as x0,y0 are actually from any x,y input, the worst case delay actually comes from x3,y3 because the generate signal for the CLA block does not depend on the propagate signal of x0,y0
  • Table 5.2: x0,y0 -> c8 delay should be 15.8, NOT 16.2
  • Table 5.2: x0,y0 -> c12 delay should be 16.6, NOT 17