The instructions are sumarized in the table below.
| 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | Instruction | Description | Condition bits (Z, O) |
| 0 | 0 | 0 | r1 | r2 | unused | add r1,r2 | r1 = r1 + r2 | Set/Reset O,Z | ||||
| 1 | r1 | r2 | unused | sub r1,r2 | r1 = r1 - r2 | Set/Reset O,Z | ||||||
| 1 | 0 | r1 | #n | addi r1,#n | r1 = r1 + #n | Set/Reset O,Z | ||||||
| 1 | r1 | #n | subi r1,#n | r1 = r1 - #n | Set/Reset O,Z | |||||||
| 1 | 0 | 0 | r1 | r2 | #n | ld r1,#n(r2) | r1 = mem[r2 + #n] | O,Z not affected | ||||
| 1 | r1 | r2 | #n | st #n(r2),r1 | mem[r2 + #n] = r1 | O,Z not affected | ||||||
| 1 | 0 | r1 | #n | lui r1,#n | r1[5..9]=#n, r1[4..0]=0 | O,Z not affected | ||||||
| 1 | 0 | 0 | #n | brno Label | branch if no overflow | Z not affected, O Reset | ||||||
| 1 | #n | brnz Label | branch if not zero | Z Reset, O not affected | ||||||||
| 1 | 0 | unused | pause | Pause | Z,O not affected | |||||||
| 1 | r | unused | jmp r | PC = r | Z, O not affected | |||||||
The "lui" instruction loads the leftmost 5 bits in the designated register with the immediate operand, and it sets the rightmost 5 bits to zero. The branch instructions ("brno" and "brnz") are PC relative. The 5-bit offset is interpreted as 5 bit signed number, allowing a branch of up to 15 instructions forward or -16 backward. Note: The offset should be added to the incremented PC. Thus, using an offset of zero will result in the next instruction being executed, no matter how the condition code bit ("O" or "Z") is set.
The overflow bit ("O") will be set whenver the result of ALU instruction is overflow, and will be reset when no overflow occurs for an ALU instruction. The zero bit ("Z") will be set whener the result of an ALU instruction is zero and reset when a result is not zero. The "brno" instruction will reset the overflow bit, and "brnz" will reset the zero bit. Other instructions do not affect condition bits.