Follow this link to the CSE 140L Webpage

CSE 140 Spring 2011 

(Tu/Th: 5:00 - 6:20 pm, WLH 2111)

Instructor:

Alex Orailoglu, alex@cs.ucsd.edu

Office Hours:
Mondays 3:30 -- 4:30 PM and Wednesdays 1:30 -- 2:30 PM

EBU3B 3134

Teaching Assistant:

Baris Arslan

Office Hours

Mondays 8:00 -- 10:00 PM

EBU3B B240A

 

Discussion Section

Wednesdays 5:30 - 6:50 PM

WLH 2204

 

Tutor:

Kevin Batman

Office Hours

Mondays 12:15 -- 1:45 PM

EBU3B B260A

Tuesdays 1:30 -- 3:00 PM

EBU3B B240A

 

 

 

Text Book: Principles of Digital Design, by Daniel D. Gajski, Prentice Hall, 1997. Available in the reserve section of the undergraduate library.

Handouts:
  1. Course Info
  2. Course Policy
  3. Course Contents
  4. Multiplication and division
  5. IEEE 754 number representation
  6. Error detection and correction
  7. Quine-McCluskey Algorithm

Midterm 1: April 26, 2011

Midterm 2: May 19, 2011

Final: June 9, 2011, 7:00 -- 10:00 PM

Evaluation:

 

Midterm 1

20%

Midterm 2

20%

Pop Quizzes

10%

Final

40%

Homeworks

10%

 

 


*** CSE140 final review section will be held on June 5, 2011 (Sunday) at 3:00PM in EBU3B 2154***.


*** Finals Week Office Hours:***.

* Baris Arslan - Monday at 8-10PM - EBU3B B240A

* Kevin Batman - Tuesday at 3-5PM - EBU3B B240A

*Please check back frequently to see the updated announcements.

 

 

Homeworks:
  1. HW1 Due April 25, 2011 (Monday) at 3PM
  2. HW2 Due May 18, 2011 (Wednesday) at 3PM
  3. HW3 Due June 3, 2011 (Friday) at 3PM

 Link to WebCT: http://webct.ucsd.edu/

Please read the tutorial on how to turn your homeworks

 

 

Errors in the text book:

1.        Fig 2.10 part C: excess 1032 should be excess 1023

2.        Fig. 3.3: xi, yi -> si delay should be 7.6, NOT 7.2

3.        Fig. 3.4 xi, yi -> ci+1 delay should be 3.2, NOT 4.2

4.        Fig. 3.5 AOI 3-wide, 2-inputs, marked delay on the schematic should be 2.2 not 2.0 Consequently all 4.4 ns delay paths in summary should also be 4.6

5.        Page 144, QM tables, subcubes (8,9) should be 1 0 0 _ instead of _ 0 0 1; subcubes (9,13) should be 1 _ 0 1 instead of 1 0 _ 1; subcubes (13,15) should be 1 1 _ 1 instead of 1 _ 1 1.  Figure 4.18 (d), the prime implicant expression of P2 should be wx'y' instead of x'y'z; the prime implicant expression of P4 should be wy'z instead of wx'z; the prime implicant expression of P6 should be wxz instead of wyz. Corresponding changes of the expressions should also be made in the PI list, EPI list and Cover lists in Figure 4.18(e), as are done in your Chapter 4 handout

6.        Table 5.2: The delays marked as x0,y0 are actually from any x,y input, the worst case delay actually comes from x3,y3 because the generate signal for the CLA block does not depend on the propagate signal of x0,y0

7.        Table 5.2: x0,y0 -> c8 delay should be 15.8, NOT 16.2

8.        Table 5.2: x0,y0 -> c12 delay should be 16.6, NOT 17