CSE 140L Lab 4 Module Building Tutorial

This tutorial is going to briefly introduce how to build modules using a simpler way than the block tool we used before.

1. Open the schematic diagram or VHDL code you have finished to construct the module, assuming the name is abc.bdf or abc.vhd.

2. In the main menu, click File -> Create/Update -> Create Symbol Files from Current File. If there is no error in your schematic of VHDL file, a symbol called abc will be created.

3. Then, when you want to add symbols in the top level design file, you can find a directory called "Project" which is different from the Altera library symbols, and the module abc exists there. You can add the module you just created like adding an AND gate or a megafunction.

Note: The input ports of the module always appear in the left side and output ports always appear in the right side. The order of the input/output ports depends on the relative positions in the schematic file or the order in the entity defition in the VHDL code. You can adjust the order to simplify your wire connections among modules.