CSE 141 (Spring 2008) - Course Schedule


WARNING! This schedule is TENTATIVE; anything more than a week into the future is likely to change. Please check regularly (and refresh your browser) for updates.

Lecture slides will be made available on the class website. They will only available to those people on the UCSD network (or accessing it via proxy).

Please do the reading for a given day before class to make things more interactive. It will help count towards your participation grade.

Date Topic Reading Slides Note
Tu 4/1/08 Introduction Chapter 1 (and review Chapter 2 and 3) L1 Welcome to CSE 141!
Th 4/3/08 Intro / MIPS Chaper 2: Sections 2.1 - 2.6, 2.9 L2  
Tu 4/8/08 Performance Chapter 4: first half L3
Th 4/10/08 Performance, part II Chapter 4: second half L4 HW #1 due.
Tu 4/15/08 Single-cycle Processor Chapter 5: Sections 5.1 - 5.4 L5
Th 4/17/08 Single-cycle Processor - Control Logic     HW #2 due.
Tu 4/22/08 Multicycle Processor Chapter 5: Section 5.5 L6
Th 4/24/08 Multicycle / Microprogramming, Exceptions Chapter 5: Section 5.7, Chapter 5: Section 5.6    
Tu 4/29/08 Pipelining Chapter 6: Sections 6.1 - 6.4 L7   HW 3 Due
Th 5/1/08
Midterm
Tu 5/6/08 Data Hazards and Branch Hazards Chapter 6: Sections 6.4 - 6.5 L8  
Th 5/8/08 Branch Hazards & Branch Prediction Chapter 6: Section 6.6    
Tu 5/13/08 Caches Chapter 7: Sections 7.1 - 7.2 L9    
Th 5/15/08 Caches Chapter 7: Sections 7.3 L10   HW 4 Due Friday 5/16 (big)
Tu 5/20/08 Virtual Memory Chapter 7: Section 7.4   L11  
Th 5/22/08
Midterm
Tu 5/27/08 Modern CPUs Chapter 9: Section 9.3, 9.4, 9.6, 9.7 (CD)      
Th 5/29/08 Multicore #1     Hw 5 due;
Tu 6/3/08 Multicore #2     Read this paper.
Th 6/5/08 Last Test    
Mo 6/9/08 Final Exam - 11:30a-2:30p Peterson 102