Homeworks will be given approximately every week. They will usually be available on the webpage
on Tuesday and due, in lecture, the next Tuesday.
There will be two parts to each homework assignment: required problems and recommended problems.
You will submit only the required problems. The recommended problems are meant to reinforce
the material and enrich your learning. While you can get full credit on homeworks doing only the
required problems, to do well on quizzes and exams, you will want to do the recommended problems also.
Required problems (i.e. the ones you turn in) must be done ON YOUR OWN. You are, however,
encouraged to work with others on the recommended problems (and any other problems from the book
that weren't assigned).
Homeworks must be typed or clearly handwritten. Illegible/unreadable answers will receive
no credit.
Homework:
Please note that, unless otherwise stated, all problems are from the Patterson & Hennessy (P&H) textbook.
Remember that you should turn in only the required problems (i.e. not the recommended ones).
Homework 6. Due: Tuesday, June 5
Notes:
For problem 7.10, you are asked to refer to the address stream given in problem 7.9. Please note that these addresses are word address. In order to get the byte address (which you should use instead of word addresses), just multiply by 4.
Required Problems:
Problem 1: P&H 7.10
Problem 2: P&H 7.29
Recommended Problems:
P&H 7.2-7.4, 7.9, 7.17-7.19, 7.25-7.27
Homework 5. Due: Thursday, May 24
Notes:
For problem 6.34, you are to assume that memory takes 2 cycles to access. This applies to both instruction
memory and data memory. Assume that only one instruction my address memory each cycle. That is to say that
you CAN'T have one instruction start a memory access in cycle X, then in cycle X+1 have another
instruction access memory while the last instruction finishes its access. You CAN have two different
instructions using instruction and data memory concurrently but not two instructions accessing the same
memory concurrently.
Required Problems:
Problem 1: P&H 6.34
Problem 2: P&H 6.35
Problem 3: P&H 6.36
Problem 4: There is a large number of branch predictors that have been proposed. Pick one of them
that wasn't described in the book and write a one paragraph (~5 sentences) summary of how it works.
Recommended Problems:
P&H 6.37, 6.38
Homework 4. Due: Thursday, May 17
Notes:
Figure 6.14.10 is incorrect. An updated version of this figure can be found here.
Required Problems:
Problem 1: P&H 6.3
Problem 2: P&H 6.4
Problem 3: P&H 6.13 - The wording of this problem is confusing. Basically,
what you need to do is to look at the datapath given in figure 6.4.10 and determine
which instructions are in each stage of the pipeline (IF-ID-EX-MEM-WB). If you are
unable to determine which instruction is in that stage, specify all the
instructions that could be here and say what other information you would need to be
able to determine exactly which one it was.
Problem 4: P&H 6.21
Recommended Problems:
P&H 6.1, 6.2, 6.14, 6.22
Homework 3. Due: Thursday, May 3
Notes:
There is an error in Figure 5.38 in some versions of the textbook! The correct version figure 5.38 can be found here. Please check to make sure your book is the same.
Problem 1: Decode the following MIPS instructions into assembly language instructions: Hint: Use the MIPS Data Reference Sheet (green).
The break down into groups of 4 is just for readability.
a) 0000 0000 1110 1000 1001 1000 0010 0000
b) 0010 0001 0000 1001 0000 0000 1111 1111
c) 0000 1000 0000 1100 0000 0000 0000 0001
Problem 2: P&H 4.10
Recommended Problems:
What are the three basic formats supported by MIPS? For each one
give its name and describe it's format telling what information is
stored in each bit field. Also give an example of a MIPS instruction
that is of that type.
