CSE 240 -- Principles in Computer Architecture

• H&P problems 1.1b,c,d, 1.4, 1.5, 1.12, 1.14, 2.2, 2.3
• solutions

HW#2:  Due Thursday, October 21

• H&P problems 2.6, 2.10, 2.12, 3.1, 3.3(b,c,d,f), 3.6
• WebSurf#1: Surf the web and find the length of the integer pipeline in the following machines: Pentium,

              Pentium III, Alpha 21264, MIPS R10000. Give the full pipeline description (names of all stages)
              for one of those machines.
• solutions (part1, part2) [part 2 fails in ghostview, but should print okay]

HW#3:  Due Thursday, November 4

• H&P 4.2, 4.3, 4.6, 4.7, 4.8
• solutions

HW #4:  Due Thursday, November 18

• H&P 4.10, 4.14a,f,g,k, 4.20
• WebSurf #2:  Surf the web (or whatever other source you may have) and tell me which of the following processors are dynamically scheduled (issue instructions out-of-order) and which are not (i.e., which have in-order issue): MIPS R10000, Sun UltraSparc, Alpha 21264, Pentium, Pentium Pro.
• solutions

HW #5:  Due Thursday, December 9

• H&P (5.2abcdeh or 5.3), 5.4, 5.8a, 5.9, 5.13, 5.14
• How many instuctions can the following machines execute in one cycle: MIPS R10000, Alpha 21264, Pentium III?
• Tell me the configuration (e.g., size, associativity, block size, write-through/write-back) of all on-chip caches for the following machines: Alpha 21164, Alpha 21264, Pentium III, MIPS R10000
• solutions