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i.
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Design the Ripple Counter using J/K flip-flop. Briefly describe your design using a timing diagram.
With the same design, you can't simply replace the J/K flip-flop and put a D flip-flop
to obtain the same result. Why not? What additional logic do you need to add around the D-FF so it will work as a counter?
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ii.
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Build and simulate the J/K flip-flop ripple counter circuit using xilinx.
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iii.
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With the same design, you can't simply replace the J/K flip-flop and put a D flip-flop
to obtain the same result. Why not? What additional logic do you need to add around the D-FF so it will work as a counter?
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90% will based on the completeness and correctness of the report. 10% will
based on the neatness, organization, and following instruction of the report
format.