CSE 140L Hardware Lab Two

Circuits with Feedback: Latches and Flip-Flops

Due date: Nov. 10, 1999 (Note the due-date changed)

Objectives

We will learn about various kinds of circuits with feedback including latches and flip-flops.

Part 1. SR Latch (NAND)

Construct the SR latch using a loop of two NAND-2 gates.

i.	Draw a state diagram of the latch. Note that state 11 under input 11 leads to a race, i.e. the new state depends on which input arrives first. Since there are 2 state variables, the diagram contains four states. Use a splitting dashed arrow to demonstrate the race.
ii.	Build and simulate the circuit using xilinx. Compare the state diagram with the simulation result.
iii.	Demonstrate your circuit to the TA: ______________________

Part 2. SR Latch (NOR)

Similiar to SR Latchn in Part 1. Instead of using NAND gates, construct the SR latch using a loop of two NOR-2 gates.

i.	Draw a state diagram of the latch. Note that state 00 under input 00 leads to a race, i.e. the new state depends on which input arrives first. Since there are 2 state variables, the diagram contains four states. Use a splitting dashed arrow to demonstrate the race.
ii.	Build and simulate the circuit using xilinx. Compare the state diagram with the simulation result.
iii.	Demonstrate your circuit to the TA: ______________________

Part 3. Enabled SR latch

Add an enable line to the SR-latch to build a transparent latch. Use 4 NAND-2 gates to construct the latch.

i.	Make a state table for the SR-latch with inputs S, R and Enable.
ii.	Build and simulate the circuit using xilinx.

Part 4. Master/Slave Flip-Flop

Connect two SR-latches in part 3 to make a master/slave flip-flop.

i.	Draw a state diagram of the flip-flop. Describe the characteristics of a M/S Flip-Flop.
ii.	Build and simulate the circuit using xilinx.

Part 5. J/K Flip-Flop

Modify the master/slave flip-flop to the J/K flip-flop.

i.	Draw a state diagram of the J/K flip-flop. Describe the difference between a M/S flip-Flop and a J/K flip-flop.
ii.	Build and simulate the circuit using xilinx.

Part 6. D Flip-Flop (CANCELLED)

Modify the master/slave flip-flop to the D flip-flop.

i.	Draw a state diagram of the D flip-flop. Describe the difference between a M/S flip-Flop and a D flip-flop.
ii.	Build and simulate the circuit using xilinx.

Report
Title page:

Names of students and due date.
Title of the lab and objective.
A brief description of each person's contribution.

Content:

Part 1 i, ii, iii
Part 2 i, ii, iii
Part 3 i, ii
Part 4 i, ii
Part 5 i, ii
Part 6 i, ii (cancelled)

Verification:

Attach the lab assignment (this handout) at the end of the lab report with the TA verification.
Reminder: Once again, think of yourself as the grader but doesn't have the hand out. The grader should know what you did in the lab without looking at the hand out.

Grading

90% will based on the completeness and correctness of the report. 10% will based on the neatness, organization, and following instruction of the report format.