CSE 140L Hardware One

Combinational Circuit Design: Full-Adder, Decoder/Encoder Circuits

Due date: Oct. 21, 1999



Objective

In this lab, we will build a half-adder, a full-adder and a 4-bit adder from the full-adder. We will also build a gray-code encoder & decoder.

Part 1. Full-adder.

i. Design a full-adder starting with a half-adder. Briefly describe the design (how a 1/2 adder works and how putting together two 1/2 adders will make up a full-adder).
ii. Use the enclosed full adder tutorial to build a full adder using xilinx program.
iii. Build a 4-bit adder using xilinx & simulate the 4-bit adder using xilinx.
iv. Demonstrate the 4-bit adder to the TA_____________________________________

Part 2. Construction of a Combinational Logic for the Gray-code ENCODER

Design a combinational logic circuit that converts three-bit binary code to three-bit gray-code (Gray Code ENCODER)

abc wxy
000 000
001 001
010 011
011 010
100 110
101 111
110 101
111 100

i. Briefly describe what a gray-code encoder is.
ii. Design the encoder circuit (K-map, Algebraic expression)
iii. Build the gray-code encoder circuit & simulate the gray-code encoder using xilinx.

Part 3. Construction of a Combinational Logic for the Gray-code DECODER

wxy efg
000 000
001 001
011 010
010 011
110 100
111 101
101 110
100 111

i. Briefly describe what a gray-code decoder is.
ii. Design the encoder circuit (K-map, Algebraic expression, etc.)
iii. Build the gray-code dncoder circuit & simulate the gray-code decoder using xilinx.


Report
Title page: Content: Verification: Grading

90% will based on the completeness and correctness of the report. 10% will based on the neatness, organization, and following instruction of the report format.