CSE 30 -- Lecture 1 -- Sep 29

This lecture covers basic computer organization: processor, memory, and I/O devices on a system bus, and the processor's internal structure of control logic, functional units, and internal busses. (This is a slightly different -- more detailed -- picture than that given in the book.)

I/O devices include displays (graphics adapters), disk controllers, audio cards, network interfaces, etc.

Busses are just bundles of wires for carrying related electrical signals. The system bus includes two subcomponents, the address bus and the data bus. When the CPU fetches instructions or data, it places the address of the instruction or data on the database, and the memory module recognizes the address as ``belonging'' to it and responds by places the memory contents (the instruction or the data) on the data bus, whereupon the CPU will sense the value. You should think of the memory module as a large array, and an address as simply an integer index into the array. This integer is sent over the address bus in binary form -- each wire has two valid voltage levels -- and similarly, the data is read from the memory as a binary value.

The CPU has internal modules too:

The register file is another sort of memory -- there are only a few of them (on the MIPS architecture, there are 32), but access to their contents is extremely fast, because they are on-chip. Main memory, outside of the CPU, is implemented in DRAM (Dynamic Random Access Memory) on separate chips. There is a huge amount of main memory in comparison: most machines these days have 32-128 MB (MB stands for "MegaByte" == 2^20 bytes or approx 10^6 bytes), in comparison to 32*4=128 bytes in a typical register file. Access main memory, however, is slow, since the CPU send signals vast distances (a few inches) to the memory and wait for the response. Compared to on-chip distances of millimeters or less, the time required for the signals to propagate over the fifteen centimeters or so is enormous -- electrical signals travel at the speed of light in its medium, and over copper wires is something like 2/3 the speed of light in vacuum,

Compilers generally keep variables in main memory, and registers are used to hold temporary copies of them while the CPU is modifying the variables. Indeed, most RISC instruction sets do not allow directly modifying memory -- they employ a ``load/store'' architecture, where memory contents must be loaded into a register before being used. Some very frequently used variables may be kept in a register for efficiency. In C and C++, the register storage class specifier tells the compiler that the programmer believes that the variable will be heavily used, as a hint to give greater priority to placing that variable over others in a register.

The processor-to-memory pathway is actually a little more complex in modern systems. There is a cache that sits between the processor and the system bus:

The cache contains associative memory -- think of this as tables containing address and cache line pairs, where a cache line is several contiguous words of memory (32-128 bytes). When the processor load from memory, the cache is first consulted; the load address are compared against all the addresses in the cache (in parallel), and if a copy of the memory word is in the cache, that copy can be quickly returned to the processor: the cache memory is typically implemented from SRAM (Static Random Access Memory), which is faster than DRAM but is more expensive and less dense. This is known as a cache hit. If, on the other hand, there are no copies in cache memory, the cache will forward the memory load request to the DRAM (actually, the cache will load an entire cache line). This is known as a cache miss. The expected time to do a load is t = thit p + tmiss (1-p), where p is the probability of a cache hit. When expressed as a percent, p is also called the hit rate. Most programs have good locality of reference, which makes having a cache improve throughput (another way to look at it is that p tends to be high through the execution of the program).

Missing from this web page are answers to: "why the first time you load a variable's contents you do not necessarily incur a cache miss?", "why is there locality of reference?", "what are the factors that affect p?", w"hat are the factors that affect the values of thit and tmiss in a system?" You should find out the answers to these questions, from the book or from discussions with your fellow classmates. Make sure you understand the reason behind the answers -- don't just memorize them.

Coming wed: change of base, computer arithmetic, number representation, instruction sets.

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