CSE 140L Fall 2017 

(Mondays : 1:00 - 2:50PM, CENTR 212)

Instructor:

Alex Orailoglu, alex@cs.ucsd.edu

Office Hours:
Wednesdays 3:00 -- 4:00 PM and Thursdays 1:30 – 2:30 PM

EBU3B 3134

TA

Darren Eck

Office Hours:

Fridays 4:00 – 6:00 PM

EBU3B B250

Tutors

Shuyi Ni

Office Hours:

Saturdays 3:00 PM – 7:00 PM

EBU3B B250

Ladislav Steffko

Office Hours:

Sundays 3:00 PM – 7:00 PM

EBU3B B250

Announcements:
*Please check back frequently to see the updated announcements.

** (10/24) A handout from CSE 140 pertaining to error correction/detection has been posted.

*Course Info

*Course Policy

*Here's a tutorial for LogicWorks

                 LogicWorks review

*Here are some tutorials for the Verilog assignments:

1. Quartus Tutorial
2. Modelsim Tutorial
3. Verilog Tutorial

*For those of you who need a quick functional review of basic circuits,
please read the "Review of simple circuits" handout

Lab1:

Lab 1 Files    Due October 8, Sunday, 11:59pm

Lab2:

Lab 2 Files    Due October 22, Sunday, 11:59pm

Lab3:

Lab 3 Files    Due November 5, Sunday, 11:59pm

Lab4:

Lab 4 Files    Due November 19, Sunday, 11:59pm

Lab5:

Lab 5 Files   Due December 3, Sunday, 11:59pm

Final:

December 11, 11:30am – 2:30pm