cse141: Introduction to Computer Architecture

EBU3B(CSE) 2154 (Starting from Oct 1st)
Lectures Tue. & Thu., 3:30p-4:50p (Peterson Hall 103) ; Disc. section Wed. 4:00p-4:50p (Warren Lecture Hall 2204)
Fall, 2009
Shortcuts: Schedule Homeworks Projects

Instructor

Steven Swanson
Email: swanson @ cs.ucsd.edu
IM (not email): professorswanson@{AIM, Yahoo!, google talk, MS Messenger}
Office: EBU3B 3212
Office Hours: Mon. 12:00-1:00; Thur. 12:30-1:30
UCSD homepage

Teaching Assistant

Hung-Wei Tseng
Email: h1tseng @ cs.ucsd.edu
IM (not email): bunnyhwtseng@AIM
Office: EBU3B B260A
Office Hours: Monday 4:00p-5:00p, Wednesday 11:00a-12:00p, or by appointment
UCSD homepage

Course discussion board: cse141. Required reading. Get signed up.

Course Description

This course will describe the basics of modern processor operation. Topics include computer system performance, instruction set architectures, pipelining, branch prediction, memory-hierarchy design, and a brief introduction to multiprocessor architecture issues.

This course is taught in tandem with 141L. Unless you have discussed it with you me, you should be in enrolled in both.


Text books

Required: Patterson & Hennessy, Computer Organization and Design: The Hardware/Software Interface, Patterson & Hennessy, Morgan Kaufmann, 4th Edition
Required: Other assigned readings throughout the quarter.
Optional: The History of Computing This a great set of lectures from a course taught at UCSD/UW/Berkeley three years ago. Most of them are buy the folks that actually made the history (Steve Wozniak, Ray Ozzie, Gordon Bell, etc.).

Grading

In addition to the contributions below, class participation (speaking up in class, attending office hours, etc.) can raise your grade up to one "notch" (e.g., B to B+).

Homework 10% Homeworks will be assigned through the course. They are due on Thursdays.
Quizzes 10% Every Thursday there will be a quiz.
Project 15% Design your own ISA! See below
Midterm 25% The midterm is on November 3rd.
Final 35% The final will be cummulative.
Class participation 5% Speak up in class. Contribute to the web board. Come to office hours.

Additional notes about grades in this course:


Schedule

I will post the slides for most lectures. Since the slides contain material I am not allowed to distribute publically, they are password protected. I have posted the username and password to the web board.

Reading should be done before class on the day they are listed. It is essential that you do the readings. I will not cover everything you are responsible for in class.

Date Topic Readings Slides Due Notes
Thursday, September 24 Introduction and Administrivia 00_Introduction.pdf
Tuesday, September 29 Instruction Set Design Read: 1.1-1.3; 2.1-2.7; Key points: Types of machines and general terminology. Parts of the machine. Key components of an instruction set. Operand storage in registers and memory. Arithmetic, logical, and memory operations in MIPS 01_ISA.pdf
Thursday, October 1 Instruction Set Design Read: 2.8, 2.10, 2.12-2.13, 2.16-2.19 Skim/Review: 2.4, 2.6, 2.9, 2.14; Key points: Function calls, translation from source code to machine code, the diversity of ISA design decisions between MIPS, ARM, and x86. 02_ISA.pdf,
03_project.pdf,
04_quizzes_hw_microprojects.pdf,
MP0_ISA.pdf
Assignment 1-1; Assignment 1-2;
Tuesday, October 6 Instruction Set Design Read: 2.8, 2.10, 2.12-2.13, 2.16-2.19 Skim/Review: 2.4, 2.6, 2.9, 2.14; Key points: Function calls, translation from source code to machine code, the diversity of ISA design decisions between MIPS, ARM, and x86. 05_ISA.pdf,
S_x86_64.pdf
Thursday, October 8 Measuring Performance Read: 1.4-1.9; Key points: Speedup. The performance equation. Amdahl's law. Benchmarks and their short comings 06_Performance.pdf,
01_CodeAnalysisExample.pdf
Assignment 2;
Tuesday, October 13 Measuring performance Read: 1.4-1.9; Key points: Speedup. The performance equation. Amdahl's law. Benchmarks and their short comings 07_Performance.pdf
Thursday, October 15 Performance/Single Cycle processors Read: 4.1-4.4; Key points: Designing a single-cycle datapath, datapath vs. control, clocking, control signals, decoding, handling branches. Review Appendix C if your logic design is rusty. Q02_key.pdf,
MP1_WhereAmI.pdf,
08_Performance.pdf,
09_SingleCycle.pdf
Assignment 3-1; Assignment 3-2;
Tuesday, October 20 Single Cycle to Pipelining Read: 4.5-4.6; Key points: Basic of pipelining. Pipelined datapath layout. Pipeline registers. Limitations of pipelining. 10_SingleCycle.pdf,
11_Pipelining.pdf
Thursday, October 22 Data hazards; SRAM Read: 4.7-4.8 12_DataHazards.pdf,
13_MemAndSRAM.pdf
Assignment 4; Project 1;
Tuesday, October 27 Control hazards; DRAM Read: 4.9 14_ControlHazards.pdf,
15_DRAM.pdf
Thursday, October 29 Midterm Review Q03_key.pdf,
Q04_key.pdf,
Q05_key.pdf
Assignment 5;
Tuesday, November 3 Midterm TBA Assignment 6;
Thursday, November 5 Branch Prediction Read: 4.10-4.14, except 4.12 08_Branches.pdf
Tuesday, November 10 Introduction to caching TBA 09_Cache_Intro.pdf,
09_x86Memory..pdf
Thursday, November 12 Memory Systems Read: 5.1-5.3 16_cache_details.pdf Assignment 7-1; Assignment 7-2;
Tuesday, November 17 Advanced caching and VM Read: 5.4-5.5 17_Cache_advanced.pdf,
Q07_key.pdf
Thursday, November 19 Virtual Memory TBA 18_VirtualMemory.pdf,
MB2_popcount.pdf,
popcount_test.cpp
Assignment 8;
Tuesday, November 24 I/O 6.1-6.13 19_IO.pdf
Thursday, November 26 Thanksgiving! No class!
Tuesday, December 1 Multiprocessors/Advanced Pipelining 7.1-7.3; 7.7 20_SuperScalarSMT.pdf,
21_CMPs.pdf
Thursday, December 3 CMPs/Wrap up and Final review TBA Q09_key.pdf,
Q08_answer.pdf,
22_CMPs.pdf
Assignment 9;
Monday, December 7 Final Exam Assignment 10; 3:00-5:59

Integrity Policy


Homework

Assignment 1: Discussion Board and Send TA your code name
Assignment 2: Instruction Set Architecture
Assignment 3: x86 and Performance Evaluation
Assignment 4: Performance Evaluation and Single Cycle Processor
Assignment 5: Pipelining
Assignment 6: Pipelining (Optional)
Assignment 7: Branch Prediction
Assignment 8: Cache
Assignment 9: Cache and I/O
Assignment 10: SS/OoO/SMT/CMP

Projects

Project 1: Design Your Own ISA