CSE 141 (Fall 2008) - Course Schedule


WARNING! This schedule is TENTATIVE; anything more than a week into the future is likely to change. Please check regularly (and refresh your browser) for updates.

Lecture slides will be made available on the class website. They will only available to those people on the UCSD network (or accessing it via proxy).

do the reading for a given day before class to make things more interactive. It will help count towards your participation grade.

Date Topic Reading Slides Note
Th 9/25/08 Introduction Chapter 1 (and review Chapter 2 and 3) L1 Welcome to CSE 141!
Tu 9/30/08 Intro / MIPS Chaper 2: Sections 2.1 - 2.6, 2.9 L2  
Th 10/2/08 Performance Chapter 4: first half    
Tu 10/7/08 Performance Chapter 4: first half L3 HW #1
Th 10/9/08 Performance, part II Chapter 4: second half L4  
Tu 10/14/08 Single-cycle Processor Chapter 5: Sections 5.1 - 5.4 L5 HW #2 Due
Wed 10/15/08 Project 1 Part A Due      
Th 10/16/08 Single-cycle Processor - Control Logic      
Tu 10/21/08 Multicycle Processor Chapter 5: Section 5.5 L6  
Th 10/23/08 Multicycle / Microprogramming, Exceptions Chapter 5: Section 5.7, Chapter 5: Section 5.6    
Mon 10/27/08 Project 1 Part B Due      
Tu 10/28/08 Pipelining Chapter 6: Sections 6.1 - 6.4 L7  
Th 10/30/08 Data Hazards and Branch Hazards Chapter 6: Sections 6.4 - 6.5 L8-  
Tu 11/4/08 Project Presentations      
Th 11/6/08 Branch Hazards & Branch Prediction Chapter 6: Section 6.6    
Tu 11/11/08 Caches Chapter 7: Sections 7.1 - 7.2    
Tu 11/18/08 Caches Chapter 7: Sections 7.1 - 7.2    
Th 11/20/08 Caches Chapter 7: Sections 7.3 L10    
Tu 11/25/08 Midterm      
Tu 12/2/08 Virtual Memory Chapter 7: Section 7.4 L11    
Th 12/4/08 Wrap-Up