cse249a: Rethinking the
Hardware/Software Interface
Tuesday/Thursday
11:00-12:20
cse4217
Instructor: Steven
Swanson
email:
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swanson
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@
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cs.
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ucsd.
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edu
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office: cse3212
class mailing list: cse249a@cs.ucsd.edu
archive
Description
The course will focus on the interface between hardware and software,
what's wrong with it, and how we might fix it. The interface
currently in vogue (von Nuemann-style execution and shared memory
multiprocessors) is in deep trouble due to technology trends and human
frailty: We can't build scalable von Neumann processors and we
are no good at programming shared memory machines. These problems
open the door to seriously rethinking and redesigning the hardware and
software components and the interactions between them.
Readings
9/23/2006: Introduction [slides]
(includes the table we
built in class)
9/26/2006: von Neumann's Design [slides]
- von Neumann, John "First Draft of a Report on the EDVAC", 1945. pdf
- Godfrey, M.D., D.F. Hendry "The Computer as von Neumann Planned
It" IEEE Annals of Computer History,
15:1, 1993. pdf
- Burks, Arthur W., Herman H. Goldstine, John von
Neumann "Preliminary Discussion of the Logical Design of an Electronic
Computing Instrument" Part 1, Vol 1.
(unpublished) in John von Neumann
Collected Works Volume V, Pergamon Press, 1963. (Call number QA
3 V948). online
- (Optional and on reserve at
S&E libary) H. H. Goldstine, John von Neumann"On the
Principles of Large Scale Computing Machines", 1946 (unpublished) in John von Neumann Collected Works Volume V,
Pergamon Press, 1963. (Call number QA 3 V948).
9/28/2006: Dataflow I [slides]
- J. B. Dennis. "A preliminary architecture for a basic dataflow
processor". In Proceedings of the
2nd Annual Symposium on Computer Architecture, 1975. pdf
- S. Swanson, K.
Michelson, A. Schwerin, and M. Oskin. "WaveScalar". In Proceedings of the 36th Annual
International Symposium on Microarchitecture, 2003. pdf
10/3/2006: Dataflow II [slides]
- D. E. Culler, K. E. Schauser, and T. von Eicken. "Two fundamental
limits on dataflow multiprocessing". In Proceedings
of the IFIP WG 10.3 Working Conference on Architectures and Compilation
Techniques for Fine and Medium Grain Parallelism, 1993. pdf
- D. E. Culler, A. Sah, K. E. Schauser, T. Eicken, and J.
Wawrzynek.
"Fine-grain parallelism with minimal hardware support: A
compiler-controlled threaded abstract machine". In Proceedings of the 4th International
Conference on Architectural
Support for Programming Languages and Operating Systems, 1991. pdf
10/5/2006: Memory Interface and Synchronization I [slides]
- Arvind, R.S. Nikhil, and K. K. Pingali. I-structures: Data
structures for parallel computing. ACM Transaction on Programming
Languages and Systems, 11(4):598–632, 1989. pdf
- P. S. Barth, R. S. Nikhil, and Arvind. M-structures: Extending a
parallel, non-strict, functional languages with state. Technical Report
MIT/LCS/TR-327, MIT, 1991. (Sections 2.4, 2.5, and 3) pdf
10/10/2006: Memory Interface and Synchronization II [slides]
- Second WaveScalar paper (Sections 5 and 6) pdf
10/12/2006: Memory Interface and Synchronization III
- Jeremy Manson, William Pugh, Sarita V. Adve, The Java Memory
Model, Proceedings of the 32nd Symposium on Principles of Programming
Languages (POPL) Jan. 2005. pdf
10/17/2006: Memory Interface and Synchronization IV
- Tim Harris and Keir Fraser, "Language Support for Lightweight
Transactions," Object-Oriented
Programming, Systems, Languages, and Applications. pp. 388--402,
2003 pdf
- Austen McDonald, JaeWoong Chung, Brian D. Carlstrom, Chi Cao
Minh, Hassan Chafi, Christos Kozyrakis, Kunle Olukotun,
"Architectural Semantics for Practical Transactional Memory" Proceedings of the 33rd Annual
International Symposium on Computer Architecture, June 2006. pdf
10/19/2006: Memory Interface and Synchronization V
- Emmett Witchel, Josh Cates, and Krste Asanovic, "Mondrian Memory
Protection" Tenth International
Conference on Architectural Support for Programming Languages and
Operating Systems (ASPLOS-X), October 2002 pdf
- E. Koldinger, J. Chase, and S. Eggers. "Architectural Support for
Single Address Space Operating Systems." In Proc. of the 5th Int. Conference on
Architectural Support for Programming Languages and Operating Systems
(ASPLOS), October 1992. pdf
10/26/2006: Unusual Architectures I
- Scott Rixner, William J. Dally, Ujval J. Kapasi, Brucek Khailany,
Abelardo Lopez-Lagunas, Peter Mattson, and John D. Owens, "A
Bandwidth-Efficient Architecture for Media Processing" Proceedings of the 31st Annual
International Symposium on Microarchitecture, 1998. pdf
- William Thies, Michal Karczmarek, and Saman Amarasinghe.
"StreamIt: A Language for Streaming Applications". In Proceedings of the 2002 International
Conference on Compiler Construction, 2002. pdf
10/31/2006: Unusual Architectures II
- K. Sankaralingam, R. Nagarajan, H. Liu, C. Kim, J. Huh,
D.C. Burger, S.W. Keckler, and C.R. Moore. "Exploiting ILP, TLP, and
DLP with the Polymorphous TRIPS Architecture," 2003 International Symposium on Computer
Architecture (ISCA), June, 2003. pdf
- Michael Bedford Taylor, Jason Kim, Jason Miller, David Wentzlaff,
Fae Ghodrat, Ben Greenwald, Henry Hoffmann, Paul Johnson, Jae-Wook Lee,
Walter Lee,Albert Ma, Arvind Saraf, Mark Seneski, Nathan Shnidman,
Volker Strumpen, Matt Frank, Saman Amarasinghe and Anant Agarwal. "The
Raw Microprocessor: A Computational Fabric for Software Circuits and
General Purpose Programs" IEEE Micro,
Mar/Apr 2002. pdf
11/2/2006: Unusual Architectures III
- Chen Chang, John Wawrzynek, and Robert W. Brodersen "BEE2: A
High-End Reconfigurable Computing System" IEEE Design & Test
of Computers, 2005. pdf
- Virtex 5 datasheet pdf (just
take a look at this)
- The Staran Associative Array Processor html
(Sorry for the change of plans, but we've talked enough about streams
to skip PipeRench)
11/7/2006: Unusual Architectures IV
- J. E. Smith. "Decoupled access/execute computer architecture". In ISCA-9, 1982. pdf
- Mark Oskin, Frederic T. Chong, and Timothy Sherwood. "Active
Pages: A Model of Computation for Intelligent Memory". In the 1998 International Symposium on
Computer Architecture (ISCA98), 1998. pdf
11/9/2006: Program Representation I
- Jeanne Ferrante , Karl J. Ottenstein , Joe D. Warren, "The
program dependence graph and its use in optimization", ACM Transactions on Programming Languages
and Systems (TOPLAS), v.9 n.3, p.319-349, July 1987. pdf
- D. Weise, R. F. Crew, M. Ernst, and B. Steensgaard. "Value
dependence
graphs: representation without taxation". In 21st Annual ACM Symposium
on POPL. ACM, Jan. 1994. pdf
11/14/2006: Program Representation II
11/16/2006: Neurologically inspire computing
- Seth Bridges, Miguel Figueroa, and Chris Diorio. "A
Reconfigurable VLSI Learning Array," in Proc. of Conference on
European Solid-State Circuits (ESSCIRC) 2005, Grenoble, France,
September, 2005. pdf
- Boahen, Kwabena "Neuromorphic Microchips" Scientific American, May 2005, Vol. 292 Issue 5, p56. pdf
- Seth Bridges, Jeremy Holleman, Ania Mitros, Miguel Figueroa,
Chris Diorio. "A Random Projection Imager for Visual Pattern
Classification in Analog VLSI," in Proc. of Conference on European
Solid-State Circuits (ESSCIRC) 2006, Montreux, Switzerland,
September, 2006. This an application of the technology in the first
paper. It's short an the system they built is very cool.
This is optional. pdf
11/21/2006: Reliability
- Jayanth Srinivasan, Sarita V. Adve, Pradip Bose, and Jude A.
Rivers, "The Case for Lifetime Reliability-Aware Microprocessors"
Proceedings of 31st International
Symposium on Computer Architecture (ISCA '04) June 2004. pdf
- Todd Austin, “DIVA: A Reliable Substrate for Deep Submicron
Microarchitecture Design,” ACM/IEEE
32nd Annual Symposium on Microarchitecture (MICRO-32), November
1999. pdf
11/28/2006: Potporri
- Michael T. Niemier, Peter M. Kogge "Logic in Wire: Using Quantum
Dots to Implement a Microprocessor". Great
Lakes Symposium on VLSI 1999: 118-121 pdf
- QCA slides pdf
- D.K. Arvind and M. Blenkiron, "Programmable In Vivo Computation" Second Workshop on Non-Silicon Computing
2003 pdf
11/30/2006: Wrap up