We will learn how to design and build a mini ALU circuit (control & datapath), as well as the control logic to calculate Fibonacci Numbers.

Lab 4 is described in the following PowerPoint file [PPT] ([PDF] also available). It consists of designing a complete datapath that includes an ALU that can implements multiple operations and a register file with 4 registers. Lab 4 also involves designing a controller that implements the Fibonacci sequence using the ALU and registers. See the [PPT] or [PDF] file for a detailed description.

Note: You are required to use busses for this lab. (See bus tutorial). You may use existing Xilinx components (adder, muxes, etc) for the ALU design.

Pass Off Schedule

100% will based on the completeness and correctness of the simulation. The TAs will be grading this assignment in the lab on the last day of class, and each pair of students will be assigned a time in which to simulate their schematic using test cases provided by the TA. Your grade will be based on the simulation results. Be sure to thoroughly test your circuit before you are graded. TAs will not grade your circuit more than once.