Lab 3

Finite machine state circuits design

Due date: Tue 11/18 in CSE140L class

Objectives

We will learn how to design and build state machine circuits. If you find counters in the Xilinx libaries, ignore them and use basic gates to implement your own.

Part 1. A gray code counter

  • There are inputs X and R to the 3-bit counter.
  • If X = 0, the counter will be a gray code counter (cycle through 000,001,011,010,110,111,101,100 and back to 000).
  • If X = 1, the counter will be a reverse gray code counter (cycle through the above in the reverse direction).
  • If R = 1, the counter will reset to 000. The counter should not be reset unless this signal is high (1).
i. Design this circuit (Include a MOORE state digram, state table, and K-maps/algebra to simplifly the circuit.
ii. Build the circuit and simulate is using xilinx. Be sure to simulate both direction completely and change input X from 0 to 1 at random time to verify the counter is reacting properly to the input changes.

Part 2. 15-second time bomb

Design a counter that starts at 15 and count to 0.
There are several input to this circuit:
  • [start] : start the counter
  • [stop] : stop the counter
  • [reset] : reset back to 15 seconds
The output should include:
  • [counter index] (in binary is OK)
  • [blow_up] indicator when the sequence reaches 0000.
You should use a D-FF that allows your to pre-set value (try FDSRE or similar ones). Note, figure out which D-FF you want to use & understand how it works before you connect all the wires together. Once you figure out how FDSRE works, you may need to add a few logics so that the time bomb does not blow up when you start.

Simulate with start=0 first, then switch start=1. The counter should be at 1111 & the blow_up indicator should be 0 until the counter becomes 0000. Also, simulate the case that when start=1 but you realize at 5 second before blowing up, you need to stop it & reset it back to 15 seconds again.

i. Design this counter (including MOORE state digram, state table, and K-maps, etc)
Note, remember to simplify your design as much as possible.
ii. Build and simulate the circuit using xilinx.

Part 3. Freeway Traffic Control

Around 4pm in the afternoon when much of the traffic starts to enter the freeway, a set of GREEN/RED signal are used to prevent highway jams. Here is how the traffic signal works.
  • There will be 2 lanes to enter the freeway: 1 carpool lane and 1 regular lane. Each lane will have a GREEN/RED signal.
  • When both lanes have cars waiting, each lane will take turns to go (GREEN will rotate between 2 lanes).
  • When both lanes have no cars, both signals will be GREEN.
  • When 1 lane has cars, only that lane will be GREEN. The other lane will always be RED.
i. Design this circuit (Include a MOORE state digram and briefly describe the state diagram and how it satisfies the requirement definition. Also include the state table, and K-maps, algebraic equation, and final schematic).
ii. Build the circuit and simulate is using xilinx

Report
You know the drill by now!