Fall 2000, Instructor: Dean Tullsen

    Welcome

Lab Assignments

(CSE 141 home page)

Basic Course Information:

• Instructor: Dean Tullsen
• AP&M 4250
• tullsen@cs
• office hours: W 10-11, Th 4-5
• TA: Ryan Schmidt
• office hours: M 3-4, Tu 4-5, W 3-4
• AP&M 2444
• raschmid@ucsd.edu
• TA: Xiaofeng Gao
• office hours: M 1-2, W 1-3
• AP&M 3337D
• xgao@cs.ucsd.edu
• Meeting times and places
• CSB 001, F 2:30-3:20
• Course textbooks and tools

There is no textbook for the class, but you will find the CSE 141 textbook helpful in many ways during the lab

Patterson & Hennessy, "Computer Organization and Design -- The Hardware/Software Interface", Morgan Kaufmann, Second Edition

The lab will utilize, for some of the lab assignments, the Xilinx foundation tools.  The PC lab, and the bookstore, both have version 1.5.  It appears the labs will be updated to Xilinx version 2.1 soon.

• Other recommended reading
• Stallings, "Computer Organization and Architecture --Designing for Performance", 4th edition, Prentice Hall
• an alternate perspective
• Hennesy&Patterson,"ComputerArchitecture:AQuantitativeApproach", 2nd edition, MorganKaufmann
• a more advanced treatment of many of the same topics in the textbook
• CPU Info Center
• everything you'd ever want to know about available commercial CPUs
• WWW Computer Architecture Home Page
• a comprehensive guide to research and general information on computer architecture available on the web.
• Computer Organization and Design, the website
• Assignments:
• Labs will typically be due two weeks after they are assigned.
• Once it is set up, the class mailing list will be used by the instructor and the TAs for announcements, etc. All students will be held responsible for announcements and information that go out over the class mailing list. Make sure you are on it. To sign up for the mailing list, send mail to listserv@ucsd.edu, with a blank subject and one line in the body:  add my_email_address cse141l-l
• We have also set up a webboard for asking questions that would be of interest to all.  To sign up to use it, go to http://webboard.ucsd.edu, select the 141L board, and click the "new user" button.  It is expected that you will peruse the web board regularly, particularly before you send us mail about a problem.  I have initialized it with several conference topics, but if there is another topic you'd like added, let the instructor know.

• The grade for 141L will be based solely on 4-5 lab reports. I expect that most students will complete the lab assignments as specified; thus the quality of the lab reports will likely be the most important factor in determining grades.
• Late assignments are not encouraged. You will have two grace days during the quarter. I.e., you can turn one assignment in two days late, or two assignments in one day late. I recommend not spending those days frivolously early in the quarter. After you have spent your grace days, late assignments will be accepted, but with no guarantees that they will be graded, and with significant penalties if they are. We will make every effort to return assignments to you in a timely manner -- limiting your ability to turn things in late is, unfortunately, critical to that goal.  Anytime after the end of class counts as a day late.  The second day begins 24 hours later.  The weekend counts as a single day.  Thus, something turned in Monday (before 9 a.m.!) that was due Friday is one day late.  Something turned in later on Monday is two days late.

• Cheating WILL be taken seriously. It is not fair to honest students to take cheating lightly, nor is it fair to the cheater to let him/her go on thinking that is a reasonable alternative in life. Don't test me on this one.
• The following is not considered cheating:

-discussing the tools or logic design techniques with other groups.
• The following is:

-Copying lab designs from someone who is not your partner, or lab report text from anyone.
-Viewing lab designs or lab reports from anyone who is not your partner, including those who have taken the class in previous years.
-Altering timing data produced by Xilinx, e.g. to make a non-working design appear to be working.
• Penalties -- anyone copying information or having information copied on a lab will receive an F in the class and will not be allowed to drop.  They will be reported to their college dean.  If you can prove non-cooperative copying took place, your grade may be restored, but you must prove it to the dean -- I don't want to be involved.

• There will be about 4 lab assignments. Each will require a written report. There will be no midterms or finals associated with the lab portion of the class. The final grade will be determined by the quality of the lab reports and the completeness and quality of the lab work (as demonstrated in the reports).
• Some but not all of the labs will require the Xilinx tools, which everyone should be familiar with.
• Most (but not all) of the labs can be done in groups of 1 to 3. Lab reports are to be done collaboratively with your fellow group members, except when specifically instructed otherwise.  Changing, splitting, merging of groups is only to be done with the permission of the instructor, and such permission is typically not given.
• Lab resources:
Xilinx Foundation tools are available in
-APM 2444 and  EBU2 315
-personal copies of Xilinx are available through the bookstore and bigwords.com.
Suns will be available in the uAPE lab in the AP&M basement.