Online Proceedings

MTEAC-5

December 1, 2001 -- Austin, Texas


Session I

Message-Passing for the 21st Century:  Integrating User-Level Networks with SMT, Mike Parker, Al Davis, Wilson Hsieh, University of Utah.
A Binary Translation System for Multithreaded Processors and its Preliminary Evaluation, Kanemitsu Ootsu, Takashi Yokota, Takafumi Ono, Takanobu Baba, Utsunomiya University.
 

The Predictability of Computations that Produce Unpredictable Outcomes, Tor Aamodt, Andreas Moshovos, Paul Chow, University of Toronto.

Session II
Hierarchical Multi-threading for Exploiting Parallelism at Multiple Granularities, Mohamed M. Zahran, Manoj Franklin, University of Maryland.

 

Basic Mechanisms of Thread Control for On-Chip-Memory Multi-threading Processor, Takanori Matsuzaki, Hiroshi Tomiyasu, Makoto Amamiya, Kyushu University.
 

Maximizing TLP with Loop-Parallelization on SMT, Diego Puppin (Massachusetts Institute of Technology), Dean Tullsen (University of California, San Diego).

Session III:Keynote Address
Speculative Multithreading:  From Multiscalar to MSSP, Guri Sohi, University of Wisconsin, Madison.
Session IV
Branch Prediction in a Speculative Dataflow Processor, Bradley C. Kuszmaul, Dana S. Henry, Akamai and Yale University.
 

A Study of Compiler-Directed Multithreading for Embedded Applications, Anasua Bhowmik, Manoj Franklin, Quang Trinh, University of Maryland.
 

Prefetching in an Intelligent Memory Architecture Using a Helper Thread, Yan Solihin, Jaejin Lee, Josep Torrellas, University of Illinois, Urbana-Champaign.

Session V:Keynote Address
Multithreading for Latency, John P. Shen, Intel Corporation.