Multi-tier Programming
Multi-tier parallelism is an effective solution to enhancing machine performance,
and is typically delivered as an interconnected collection of Symmetric
Multiprocessors (SMPs). Several vendors support multi-tier parallelism,
including Sun Microsystems, Compaq, IBM, and Cray/SGI.
What characterizes multi-tier computing? The presence of multiple levels
or modes of locality. For example Alpern, Carter, and Ferrante, identify
the PMH model with
the goal of unifying the treatment of the multiple levels of the physical
parallel memory hierarchy.
Multi-tier locality is not necessarily restricted to multi-tier hardware,
since multi-tier locality may be logical rather than physical. For example,
coupled multidisciplinary applications employ task parallelism, and may
divide a single parallel computer into processor subsets with each set
used to solve a different piece of the problem. The pieces are computed
in parallel, communicating information across their common boundaries.
Parallelism also exists within the pieces, which may communicate by passing
message or shared memory. Too, some applications such as
structured
adaptive mesh refinement have a more elaborate computational structure,
which is dynamic and data-dependent.
KeLP2
Maintained by
Daniel
Shalit. Last modified: Thurs Nov 1 06:20:28 PST 2001