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Sponsored by the IEEE Computer Society Test Technology Technical Committee, and the IEEE Computer Society Design Automation Technical Committee.
	The Second IEEE International High Level Design Validation and Test Workshop aims to stimulate research in test and validation methodologies for ICs and systems specified using high level descriptions, where high level refers to register-transfer, behavioral, and system level specifications. The goal of the workshop is to provide an informal forum, bringing together designers and test and verification researchers working in validating, debugging, and testing designs, in an effort to address high level design validation and test issues concurrently.