InstructorSteven Swanson
Office: EBU3B 3212 Office Hours: Tuesday: 2:00-3:00, Friday: 10:00-11:00 UCSD homepage Teaching AssistantSat Garcia
Office Hours: Monday: 1:00-2:00; Wednesday: 4:00-5:00 Course discussion board: cse240a. Required reading. Get signed up. |
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Computer processor design is undergoing a revolution. Technology constraints mean that conventional design can no longer satisfy our ever-growing appetite for raw single-threaded performance and the myriad applications it enables. As a result, designers must reevaluate existing techniques and develop new approaches for designing next generation processors.
This course will describe the basics of modern processor operation and the technology trends that necessitate a thorough re-thinking of processor design. Topics include instruction set architecture, pipelining, pipeline hazards, bypassing, dynamic scheduling, branch prediction, out-of-order issue, memory-hierarchy design, advanced cache architectures, and multiprocessor architecture issues.
Below is the basic grading scheme. You have the option of using an alternate scheme with 25% final, 15% midterm, 15% homework, and 25% projects. You will automatically select the scheme that gives you the better grade.
| Homework/paper summaries | 10% | Homeworks will be assigned through the course. |
| Projects | 20% | There will be two small projects. |
| Midterm | 20% | The midterm is on October 25th. |
| Final | 30% | The final is on December 14th at 11:30-2:30. It will be cummulative. |
| Class participation | 20% | Class participation comprises participation in class meetings and activity on the class bulletin board. |
Items in the schedule more that one week in the future are subject to
change. Check back for updates for the assigned readings, etc. The date
for the midterm will not change, however. Nor will deadlines for
homeworks/projecsts that
I will post the slides for most lectures. Since the slides contain material I am not allowed to distribute publically, they are only available from on campus or via the campus proxy. Instructions for setting up the proxy can be found here. Using the proxy is useful in general, since it gives you full access to the libraries and other resources from off campus.
| Date | Topic | Readings | Slides | Due | Notes |
|---|---|---|---|---|---|
| Thursday, September 27 | Administrivia; Overview of architecture | slides | |||
| Tuesday, October 2 | CMOS, Technology Scaling | slides | Assignment 1- 1; | ||
| Thursday, October 4 | Measuring performance, and introduction to caching | slides , slides | |||
| Tuesday, October 9 | Advanced caching | slides | Summary 1; | ||
| Thursday, October 11 | Really advanced caching | slides | |||
| Tuesday, October 16 | Virtual Memory | slides , slides | Assignment 2; | ||
| Thursday, October 18 | No class | Summary 2; | |||
| Tuesday, October 23 | Canceled due to fires | ||||
| Thursday, October 25 | Canceled due to fires | ||||
| Tuesday, October 30 | VM | slides | Project 1- 1; Project 1- 2; | ||
| Thursday, November 1 | Midterm | ||||
| Tuesday, November 6 | ISA | slides | |||
| Thursday, November 8 | Pipelining | slides | |||
| Tuesday, November 13 | Branch prediction/exceptions/multi-cycle instructions | slides | Assignment 3; | ||
| Thursday, November 15 | Introduction to ILP | slides , slides , slides | |||
| Tuesday, November 20 | Tomasulo's Algorithm | Tomasulo Diagram |
slides | ||
| Tuesday, November 27 | Case Study: Alpha 21264 | slides | |||
| Thursday, November 29 | Introduction to TLP/Simultaneous multi-threading/Chip multi-processors | slides | |||
| Tuesday, December 4 | No class | Project 2; | |||
| Thursday, December 6 | multi-processors | slides | |||
| Friday, December 14 | Final Exam | Assignment 4- 1; Assignment 4- 2; |
