Xun(Canby) Jiao

PhD Student@Computer Science
University of California, San Diego

Office: EBU3B 2140
Email: xujiao@ucsd.edu
Resume Google Scholar DBLP
Biography

I am a 4th year CSE PhD student in Computer Science and Engineering at the University of California, San Diego (since 2013). I work with Prof. Rajesh Gupta, Qualcomm Endowed Chair Professor of CSE department.

Before that, I earned a first class BSc(Eng) degree in Telecommunication Engineering with Management from BUPT-QMUL Joint Programme held by Beijing University of Posts and Telecommunications and Queen Mary, University of London, in 2013.



Research Interests


Error-tolerant Computing, Machine Learning Accelerator, Embedded System, Computer Architecture.




Publications

  • Xun Jiao, Vincent Camus, Mattia Cacciotti, Yu Jiang, Christian Enz and Rajesh Gupta
    Combining Structural and Timing Error in Overclocked Inexact Speculative Adders.[PDF]
    in Proc. IEEE/ACM Design, Automation, and Test in Europe (DATE), Lausanne, Switzerland 2017 .

  • Xun Jiao, Yu Jiang, Abbas Rahimi, and Rajesh Gupta
    SLoT: A Supervised Learning Model to Predict Dynamic Timing Errors of Functional Units.[PDF]
    in Proc. IEEE/ACM Design, Automation, and Test in Europe (DATE), Lausanne, Switzerland 2017 .

  • Xun Jiao, Yu Jiang, Abbas Rahimi, and Rajesh Gupta
    WILD: A Workload-Based Learning Model to Predict Dynamic Delay of Functional Units.[PDF]
    in Proc. IEEE International Conference on Computer Design (ICCD), Phoenix, USA 2016 .

  • Xun Jiao, Abbas Rahimi, Balakrishnan Narayanaswamy, Hamed Fatemi, Jose Pineda de Gyvez and Rajesh Gupta.
    Supervised Learning Based Model for Predicting Variability-Induced Timing Errors. [PDF][Poster]
    in Proc. IEEE International NEW Circuits And Systems (NEWCAS) conference, Grenoble, France 2015

  • Xibing Zhao, Hehua Zhang, Yu Jiang, Songzheng Song, Xun Jiao, and Ming Gu.
    An Effective Heuristic Based Approach for partitiong.
    Hindawi, Journal of Applied Mathematics, 2013, Special issue on VMI.

  • Yu Jiang , Hehua Zhang , Xiaoyu Song, Xun Jiao, William N. N. Hung , and Jiaguang Sun.
    Bayesian Network Based Reliability Analysis of PLC Systems.
    IEEE Transaction on Industry Electronics (TIE) 2012.

  • Yu Jiang, Hehua Zhang, Xun Jiao, Xiaoyu Song, William N.Hung, Ming Gu, and Jiaguang Sun.
    Uncertain Model and Algorithm for Hardware/Software Partitioning.
    IEEE Computer Society Annual Symposium on VLSI,2012.

  • Hehua Zhang, Yu Jiang, Xun Jiao, Xiaoyu Song, William N.Hung, and Ming Gu.
    Reliability Analysis of PLC Systems by Bayesian Network.
    International Conference on Software Security and Reliability (SERE) 2012 .



  • Award and Service

    Fellowship Award, UCSD, 2013-2014, 2016-2017

    First-class Honor of Bachelor Degree, BUPT&QMUL

    First-class scholarship, BUPT (top 5%)

    First Winner in Microprocessor Design Competition, BUPT

    Second-class Prize in China Undergraduate Mathematical Contest in Modeling

    Reviwer for IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD) 2017

    Reviewer for IEEE Transactions on Cyber-physical System (TCPS) 2017

    Reviewer for IEEE Transactions on VLSI (TVLSI) 2016

    Reviewer for IEEE Transactions on Industrial Informatics (TII) 2016

    Reviewer for Springer Journal of Medical System 2016

    Reviewer for IEEE Computer Society's Modeling, Analysis, and Simulation On Computer and Telecommunication Systems (MASCOTS) 2016