About Wei Hu

I recently moved to the Northwestern Polytechnical University of China as an associate professor.

I was (from May 2014 to May 2017) a postdoc in Computer Sciences with the Department of Computer Science and Engineering (CSE),
University of California, San Diego (UCSD). My supervisor is Professor Ryan Kastner.

Office: EBU3-B 3228   Phone: 858.534.8647
Email: vinnie1030 at gmail.com

 

Research Interests

My research interests are in security, formal methods, logic & synthesis, reconfigurable computing and embedded systems, including:

Security: Information Flow Security, Gate Level Information Flow Tracking, Side Channel Attacks, Cryptographic Algorithms

Formal Methods: Security Metrics, Formal Verification for Hardware Security

Logic & Synthesis: Logic and High Level Synthesis, Design Optimization, Formal Verification

Reconfigurable Computing: Reconfigurable Device for HPC, System on Chip (SoC)

Embedded Systems: Embedded System Design and Security

General: Algorithm Design and Analysis, Testing and Verification

 

Education Background

2014.5 - 2017.5: Department of Computer Science and Engineering, UC San Diego

Postdoc in Computer Science, Supervisor: Professor Ryan Kastner

2012.7 - 2014.5: School of Automation, Northwestern Polytechnic University (NPU)

Postdoc in Computer Science and Technology

2009.9 - 2011.9: Department of Computer Science and Engineering, UC San Diego

Visiting Graduate Student in Computer Science

2007.9 - 2012.6: School of Automation, NPU

Ph.D in Control Science and Engineering

 

Professional Activities

2017 IEEE/ACM International Conference on Computer-Aided Design, Session Moderator

2017 - 2018 IEEE International Symposium on Hardware Oriented Security and Trust, OC and TPC member

2017 IEEE International Conference on Application-specific Systems, Architectures and Processors, TPC member

2017 IEEE Asian Hardware Oriented Security and Trust Symposium, TPC member

 

Selected Publications

[1] Jason Oberg, Wei Hu, Ali Irturk, Mohit Tiwari, Timothy Sherwood, and Ryan Kastner. Theoretical Analysis of Gate Level Information Flow Tracking, ACM/EDAC/IEEE Design Automation Conference (DAC), 244-247, Jun. 2010. (pdf)

[2] Ryan Kastner, Jason Oberg, Wei Hu, and Ali Irturk. Enforcing Information Flow Guarantees in Reconfigurable Systems with Mix-Trusted IP, International Conference on Engineering of Reconfigurable Systems and Algorithms, Jul. 2011 (invited paper). (pdf)

[3] Wei Hu, Jason Oberg, Ali Irturk, Mohit Tiwari, Timothy Sherwood, Dejun Mu and Ryan Kastner. An Improved Encoding Technique for Gate Level Information Flow Tracking, International Workshop on Logic & Synthesis (IWLS), Jun. 2011 (oral presentation). (pdf)

[4] Jason Oberg, Wei Hu, Ali Irturk, Mohit Tiwari, Timothy Sherwood, and Ryan Kastner. Information Flow Isolation in I2C and USB, ACM/EDAC/IEEE Design Automation Conference (DAC), 254-259, Jun. 2011. (pdf)

[5] Wei Hu, Jason Oberg, Ali Irturk, Mohit Tiwari, Timothy Sherwood, Dejun Mu, and Ryan Kastner. Theoretical Fundamentals of Gate Level Information Flow Tracking, IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 30(8): 1128-1140, Aug. 2011. (pdf)

[6] Wei Hu, Jason Oberg, Ali Irturk, Mohit Tiwari, Timothy Sherwood, Dejun Mu, and Ryan Kastner. On the Complexity of Generating Gate Level Information Flow Tracking Logic, IEEE Trans. on Information Forensics and Security (TIFS), vol. 7(3): 1067-1080, Jun. 2012. (pdf)

[7] Wei Hu, Jason Oberg, Dejun Mu, and Ryan Kastner. Simultaneous Information Flow Security and Circuit Redundancy in Boolean Gates, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 585-590, Nov. 2012. (pdf)

[8] Tao Yang, Dejun Mu, and Wei Hu. Energy-Efficient Coverage Quality Guaranteed in Wireless Sensors Network, Applied Mathematics & Information Sciences, vol. 7(5): 1685-1691, 2013.

[9] Wei Hu, Jason Oberg, Dejun Mu, and Ryan Kastner. Expanding Gate Level Information Flow Tracking for Multi-level Security, IEEE Embedded Systems Letters (ESL), vol. 5(2): 25-28, 2013. (pdf)

[10] Dejun Mu, Wei Hu, Baolei Mao, and Bo Ma. A Bottom-up Approach to Verifiable Embedded System Information Flow Security, IET Information Security, vol. 8(1): 12-17, Jan. 2014.

[11] Wei Hu, Dejun Mu, Jason Oberg, Baolei Mao, Mohit Tiwari, Timothy Sherwood, and Ryan Kastner. Gate Level Information Flow Tracking for Security Lattices, ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 20(1), Article 2, Nov. 2014. (pdf)

[12] Baolei Mao, Wei Hu, Alric Althoff, Janarbek Matai, Jonathan Valamehr, Timothy Sherwood, Dejun Mu, and Ryan Kastner. Quantifying Timing-Based Information Flow in Cryptographic Hardware, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 552-559, Nov. 2015. (pdf)

[13] Ryan Kastner, Wei Hu, and Alric Althoff. Quantifying Hardware Security Using Joint Information Flow Analysis, Design, Automation & Test in Europe Conference & Exhibition (DATE), 1523-1528, Mar. 2016 (invited paper). (pdf)

[14] Wei Hu, Andrew Becker, Armita Ardeshiri, Yu Tai, Paolo Ienne, Dejun Mu, and Ryan Kastner. Imprecise Security: Quality and Complexity Tradeoffs for Hardware Information Flow Tracking, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov. 2016. (pdf)

[15] Wei Hu, Baolei Mao, Jason Oberg, and Ryan Kastner. Detecting Hardware Trojans with Gate-Level Information-Flow Tracking, IEEE Computer Special Issue on Security of Hardware and Software Supply Chain, vol. 49(8): 44-52, Aug. 2016. (pdf)

[16] Wei Hu, Alric Althoff, Armaiti Ardeshiricham, and Ryan Kastner. Towards Property Driven Hardware Security, Microprocessor Test and Verification Conference, December 2016 (invited paper). (pdf)

[17] Armaiti Ardeshiricham, Wei Hu, Joshua Marxen and Ryan Kastner. Register Transfer Level Information Flow Tracking for Provably Secure Hardware Design, Design, Automation & Test in Europe Conference & Exhibition (DATE), Mar. 2017. (pdf)

[18] Andrew Becker, Wei Hu, Yu Tai, Phlip Brisk, Ryan Kastner and Paolo Ienne. Arbitrary Precision and Complexity Tradeoffs for Gate-level Information Flow Tracking, ACM/EDAC/IEEE Design Automation Conference (DAC), June 2017. (pdf)

[19] Wei Hu, Lu Zhang, Armaiti Ardeshiricham, Jeremy Blackstone, Bochuan Hou, Yu Tai and Ryan Kastner. Why You Should Care About Don’t Cares: Exploiting Internal Don’t Care Conditions for Hardware Trojans, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov 2017. (to appear) (pdf)

[20] Armaiti Ardeshiricham, Wei Hu and Ryan Kastner. Clepsydra: Modeling Timing Flows in Hardware Designs, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov 2017. (to appear) (pdf)

[21] Baolei Mao, Wei Hu, Alric Althoff, Janarbek Matai, Yu Tai, Dejun Mu, Timothy Sherwood and Ryan Kastner. Quantitative Analysis of Timing Channel Security in Cryptographic Hardware Design, IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2017. (to appear) (pdf)

[22] Lu Zhang, Wei Hu, Armaiti Ardeshiricham, Yu Tai, Jeremy Blackstone, Dejun Mu, and Ryan Kastner. Examining the Consequences of High-Level Synthesis Optimizations on the Power Side Channel, Design, Automation & Test in Europe Conference & Exhibition (DATE), March 2018. (to appear)

 

Theses

[1] Design and Implementation of Data Encryption Methods for Mobile Storage Devices based on FPGA, Outstanding M.S. Thesis of NPU, Apr. 2008

[2] Theoretical and Applied Analysis of Gate Level Information Flow Tracking, Outstanding Ph.D. Thesis of NPU, Jun. 2012.