6th Workshop on Multithreaded Execution, Architecture, and Compilation


Tuesday, November 19

Istanbul, Turkey

in conjunction with Micro 35

Advance Program

9:00-9:15  Welcome

9:15-10:30  Keynote -- Mark Hill, University of Wisconsin

SafetyNet: Improving the Availability of Shared Memory Multiprocessors with Global Checkpoint/Recovery
10:30-11:00  Coffee Break

11:00-12:30  Session 1

Prescient Instruction Prefetch
T. Aamodt, P. Marcuello, P. Chow, P. Hammarlund, H. Wang
The KIT COSMOS Processor: A Preliminary Study on Transparent Software Prefetching via Dynamic Optimization
K. Morita, T. Sato, I. Arita

A Study on the Effect of Executing Mispredicted Load Instructions on a Speculative Multithreaded Architecture
R. Sendag, Y. Chen, D. Lilja

12:30-14:00  Lunch

14:00-15:30  Session 2

Intrathreads: Techniques for Parallelizing Sequential Code
A. Gontmakher, A. Schuster
Speculative Precomputation on Chip Multiprocessors
J. Brown, H. Wang, G. Chrysos, P. Wang, J. Shen

Application of Binary-Level Multithreading to Spec95 Benchmarks
K. Ootsu, T. Annou, M. Aoki, M. Yokota, T. Yokota, T. Baba

15:30-16:00  Coffee Break

16:00-17:00  Session 3

Branch Classification for SMT Fetch Gating
P.M.W. Knijnenburg, A. Ramirez, J. Larriba, M. Valero
Implementing Real-Time Scheduling Within a Multithreaded Java Microcontroller
S. Uhrig, C. Liemke, M. Pfeffer, J. Becker, U. Brinkschulte, T. Ungerer



The importance of multithreaded execution to both the high-end and mainstream computing industries is rapidly increasing. The focus of this workshop is on multithreading execution techniques and systems, including architecture design and implementation, compilation techniques, system and language support and performance evaluation.


Paper submissions and reviews will be done electronically. Authors are requested to submit papers not to exceed eight pages single spaced (including references, figures and tables, not including cover page) in Postscript or PDF. The cover page should include the name of the authors, a brief abstract, a list of 5 keywords and the full address of the corresponding author (including surface mail address, telephone and fax numbers, and email address). Email papers to mteac6@cs.ucsd.edu.


Paper submission: September 10. One week extension is granted without making a special request. No further extensions will be granted.
Notification: October 25, 2001
Camera-ready papers due: November 1.


Antonio Gonzalez      U. Politecnica de Catalunya
Walid Najjar             U. of California, Riverside
Dean Tullsen          U. of California, San Diego


Guang Gao                    Delaware
Sebastien Hily                Intel
David Kaeli                    Northeastern
Bobbie Manne                Intel
Trevor Mudge                Michigan
Mario Nemirovsky        Flowstorm
Yale Patt                        Texas
Andre Seznec                IRISA/INRIA
John Shen                       Intel
Per Stenstrom                Chalmers
Josep Torrellas                Illinois
Jordi Tubella                   UPC, Barcelona
Mateo Valero                UPC, Barcelona
Pen-Chung Yew            Minnesota

Last year's program.