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Hao Zhuang

Research and Working Experience

Industry/Research Labs

  • Google, Mountain View, CA, USA. (2018.07-)
    Software Engineer
    Google: To organize the world's information and make it universally accessible and useful.
    - AI + Software + Hardware

  • Apache Design Solutions at ANSYS, Inc., San Jose, CA, USA. (2015.06-2018.07)
    Senior Software Developer (2016.09-2018.07), Software Developer II (2015.10-2016.09), Software Engineer Intern (2015.06-2015.09)
    ANSYS, Inc.: The leading engineering simulation software (computer-aided engineering) company, which provides simulation technologies for designs of automobile, Internet of things, VLSI chip/architecture, and high perfomance computing, etc. ANSYS Semiconductor BU (formerly Apache Design Solutions Inc, a startup that provided industrial chip power sign-off standard software, acquired by ANSYS) .
    - Worked on EDA and CAD software for design automation for computing systems/VLSI using applied machine learning, numerical algorithms and simulation. Applied to timing analysis, dynamic voltage drop, power/EM analysis, and RTL optimization. Worked with Chief Technologiest and Apache co-founder Dr. Norman Chang (UC Berkeley EECS PhD’90). Collaborated with NVIDIA chip design team and Prof. Jang's machine learning lab at National Taiwan University.
    - Commercialized Master and PhD research works into ANSYS production lines.
    - Designed numerical time-integration algorithm, matrix solvers, and corresponding software architecture for the industrial VLSI power sign-off standard tool - ANSYS Apache RedHawk, and the latest Compute Platform RedHawk-SC at SeaScape. I mainly worked with Senior Software Architect Dr. Steven P. McCormick (MIT EECS PhD’89), who was one of pioneers in VLSI model order reduction research.
    - Designed the Chip Power Model integration in the latest production line for Reliable Automotive, Mobile And HPC Electronic Designs [news].
    - Delivered enhanced features in Totem and Pathfinder.
    - Conducted research for ANSYS big data and machine learning platform SeaScape.
    - It was my privilege to work with the teams consist of legends in the area of design automation research, such as the researcher of AWE, the creators of MIT FastCap, CMU PRIMA, UT RICE, Synopsys PrimeTime, and Apache Redhawk.

  • Synopsys, Inc., Mountain View, CA, USA. (2014.06-2014.09)
    Software Engineer Intern
    Synopsys, Inc.: The leading software and IP company in Electronic Design Automation (EDA). Products contain IC Compiler, PrimeTime, Design Compiler, Coverity, etc.
    - Delivered two critical performance improvements (programming and algorithimic aspects) on multi-thread programming and matrix solver in network rail & power analysis engine (now with PrimeTime team, the de facto timing analysis tool in the market).
    - Worked on graph partitioning algorithm and its multi-threaded programs. The algorithm I help developed in that summer scaled up the matrix solver for full-chip power network analysis with over billion graph nodes.

  • QUALCOMM Research & UCSD JSOE, San Diego, CA, USA. (2013.06-2014.06)
    FMA Researcher in VLSI ASIC & Electornic Design Automation, funded by Qualcomm FMA Fellowship.
    Qualcomm, Inc.: A global semiconductor company for wireless telecommunications products and services.
    - Designed high peformance adders/shifters for computer architecture in 3D-ICs;
    - Conducted research on 3D-ICs Global placement tools.

Universities and Research Labs

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