Hao Zhuang

Papers

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Journals and Magazines

  1. Hao Zhuang, Wenjian Yu, Shih-Hung Weng, Ilgweon Kang, Jeng-Hau Lin, Xiang Zhang, Ryan Coutts, and Chung-Kuan Cheng, “Simulation Algorithms with Exponential Integration for Time-Domain Analysis of Large-Scale Power Delivery Networks,” IEEE Trans. Computer-Aided Design (TCAD), 2016. [preprint] [arXiv] [IEEEXplore] (circuit simulation algorithm, power analysis, network analysis, matrix exponential integration, Krylov subspace).

  2. Hao Zhuang, Xinyuan Wang, Quan Chen, Pengwen Chen, and Chung-Kuan Cheng, “From Circuit Theory, Simulation to SPICE_Diego: A Matrix Exponential Approach for Time Domain Analysis of Large Scale Circuits,” IEEE Circuits and Systems Magazine (CASM), 2016. [IEEE] [Update]. (circuit simulation algorithm, matrix exponential integration, Krylov subspace).

  3. Qinggao Mei, Wim Schoenmaker, Shih-Hung Weng, Hao Zhuang, Chung-Kuan Cheng, and Quan Chen, “An Efficient Transient Electro-Thermal Simulation for Power Integrated Circuits,” IEEE Transactions on Computer-Aided Design (TCAD). 2015. [paper] [IEEE] (thermal modeling, circuit simulation, matrix exponential, Krylov subspace).

  4. Jingwei Lu, Hao Zhuang, Pengwen Chen, Hongliang Chang, Chin-Chih Chang, Yiu-Chung Wong, Lu Sha, Dennis Huang, Yufeng Luo, Chin-Chi Teng, Chung-Kuan Cheng, “ePlace-MS: Electrostatics based Placement for Mixed-Size Integrated Circuits,” IEEE Transactions on Computer-Aided Design (TCAD). May 2015. [paper] [software package] (VLSI placement, optimization algorithm, FFT solver application)

  5. Wenjian Yu*, Hao Zhuang, Chao Zhang, Gang Hu, and Zhi Liu, “RWCap: A Floating Random Walk Solver for 3-D Capacitance Extraction of VLSI Interconnects,” IEEE Transactions on Computer-Aided Design (TCAD), March, 2013. [paper] [software package] (chip interconnect, extraction and modeling, statistical algorithm, random sampling) - Listed as one of TCAD popular papers, Nominated for TCAD's Donald O. Peterson Best Paper Award 2014.

  6. Wenjian Yu, Kuangya Zhai, Hao Zhuang, and Junqing Chen, “Accelerated Floating Random Walk Algorithm for the Electrostatic Computation with 3-D Rectilinear-shaped Conductors,” Elsevier Simulation Modelling Practice and Theory, 34(5): 20-36, 2013. [paper] (chip interconnect, extraction and modeling, GPU computing)

  7. Jin He, Min Shi, Lining Zhang, Jian Zhang, Chi Liu, Hao Zhuang, and Mansun Chan, “Computation Efficient Yet Accurate Surface Potential Based Analytic Model for Symmetric DG MOSFETs to Predict Current-Voltage Characteristics”, Journal of Computational and Theoretical Nanoscience, vol. 8, no. 8, August 2011, pp. 1548-1551 (semiconductor infrastructure, device for computer architecture)

  8. Min Shi, Jin He, Lining Zhang, Jian Zhang, Zhiwei Liu, Wen Wu, Wenping Wang, Yong Ma, Xukai Zhang, and Hao Zhuang. “A Physics Based Yet Computation Efficient Core Model for Undoped Surrounding-Gate MOSFET Current–Voltage and Capacitance–Voltage Characteristics Prediction.” Journal of Computational and Theoretical Nanoscience, vol. 8, no. 9, 2011, pp. 1732-1738. (semiconductor infrastructure, device for computer architecture)

  9. Min Shi, Jin He, Lining Zhang, Chenyue Ma, Xingye Zhou, Haijun Lou, Hao Zhuang, Ruonan Wang, Yongliang Li, Yong Ma, Wen Wu, Wenping Wang, and Mansun Chan, “Zero-mask Contact Fuse for One-time-programmable Memory in Standard CMOS Processes.” IEEE Electron Device Letters (EDL), vol. 32, no. 7, July 2011, pp. 955-957. (semiconductor infrastructure, memory, device for computer architecture)

Conferences and Workshops

  1. Norman Chang, Ajay Baranwal, Hao Zhuang, Ming-Chih Shih, Rahul Rajan, Yaowei Jia, Hui-Lun Liao, Ying-Shiun Li, Ting Ku, Rex Lin, “Machine Learning based Generic Violation Waiver System with Application on Electromigration Sign-off,” Proc. ACM/IEEE Asia & South Pacific Design Automation Conference (ASP-DAC), 2018. (invited paper) (machine learning, design automation, distributed computing, MapReduce/DataFlow computation model) - H. Zhuang is in charge of distributed computing and computational kernels in this work. Ting Ku and Rex Lin are with NVIDIA. [News & Interview]

  2. Xinyuan Wang, Hao Zhuang, and Chung-Kuan Cheng, “Exploring the Exponential Integrators with Krylov Subspace Algorithms for Nonlinear Circuit Simulation,” Proc. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), November, 2017 [preprint] (circuit simulation, numerical analysis, Krylov subspace ).

  3. Zhou Fang, Mulong Luo, Fatima M. Anwar, Hao Zhuang, and Rajesh K. Gupta, “Go-RealTime: A Lightweight Framework for Multiprocessor Real-Time System in User Space,” IEEE International Workshop on Real-Time Computing and Distributed Systems in Emerging Applications (REACTION) 2016. (distributed computation systems, real-time processing).

  4. Jingwei Lu, Hao Zhuang, Ilgweon Kang, Pengwen Chen, and Chung-Kuan Cheng, “ePlace-3D: Electrostatics based Placement for 3D-ICs,” Proc. ACM/IEEE International Symposium on Physical Design (ISPD) 2016. [arXiv] [paper] (VLSI placement, optimization algorithm, 3D-IC, TSV)

  5. Jeng-Hau Lin, Hao Liu, Chia-Hung Liu, Phillip Lam, Gung-Yu Pan, Hao Zhuang, Ilgweon Kang, Patrick P. Mercier, and Chung-Kuan Cheng, “An Interdigitated Non-Contact ECG Electrode for Impedance Compensation and Signal Restoration,” Proc. IEEE Biomedical Circuits and Systems Conference (BioCAS) 2015. [paper] (signal processing, sensor, ECG, circuits)

  6. Hao Zhuang, Wenjian Yu, Ilgweon Kang, Xinan Wang, and Chung-Kuan Cheng, “An Algorithmic Framework of Large-Scale Circuit Simulation Using Exponential Integrators,” Proc. ACM/EDAC/IEEE Design Automation Conference (DAC), June 2015. (acceptance rate: 162/789=20.5%) [arXiv] [paper] [slides] [poster]. (circuit simulation, matrix exponential, Krylov subspace, large scale network analysis).

  7. Hao Zhuang, Xinan Wang, Ilgweon Kang, Jeng-Hau Lin, and Chung-Kuan Cheng, “Dynamic Analysis of Power Delivery Network with Nonlinear Components Using Matrix Exponential Method,” Proc. IEEE International Symposium on Electromagnetic Compatibility (EMC), March 2015 [paper]. (power delivery network, power grid, nonlinear systems, circuit simulation, matrix exponential, large scale network analysis)

  8. Hao Zhuang, Shih-Hung Weng, Jeng-Hau Lin, and Chung-Kuan Cheng, “MATEX: A Distributed Framework for Transient Simulation of Power Distribution Networks,” Proc. ACM/EDAC/IEEE Design Automation Conference (DAC), June 2014. (acceptance rate: 174/787 = 22.1%) [arXiv] [paper] [slides] [poster] (power delivery network, distributed computing algorithm, circuit simulation, matrix exponential, large scale network analysis)

  9. Hao Zhuang, Jingwei Lu, Kambiz Samadi, Yang Du and Chung-Kuan Cheng, “Performance-Driven Placement for Design of Rotation and Right Arithmetic Shifters in Monolithic 3D ICs,” Proc. IEEE Conference on Communications, Circuits and Systems (ICCCAS), Oct. 2013. [paper] [slides] (VLSI placement, optimization algorithm, 3D-IC, low power design)

  10. Haibing Su, Hao Liu, Shih-Hung Weng, Hui Wang, Aliasgar Presswala, Hao Zhuang, Jeng-Hau Lin, Patrick Mercier, and Chung-Kuan Cheng, “A Non-contact Biopotential Sensing System with Motion Artifact Suppression,” Proc. IEEE Conference on Communications, Circuits and Systems (ICCCAS), Oct. 2013. (sensor, ECG, circuit)

  11. Hao Zhuang, Shih-Hung Weng, and Chung-Kuan Cheng, “Power Grid Simulation using Matrix Exponential Method with Rational Krylov Subspaces,” Proc. IEEE International Conference on ASIC (ASICON), Oct. 2013. Updated on [arXiv] [paper] [slides] (power delivery network, circuit simulation, numerical algorithm)

  12. Kuangya Zhai, Wenjian Yu, and Hao Zhuang, “GPU-Friendly Floating Random Walk Algorithm for Capacitance Extraction of VLSI Interconnects,” Proc. ACM/IEEE Design, Automation & Test in Europe (DATE), Mar. 2013, pp. 1661-1666. [paper] (chip interconnect, extraction and modeling, GPU computing)

  13. Hao Zhuang, Wenjian Yu, Gang Hu, Zhi Liu, and Zuochang Ye, “Fast Floating Random Walk Algorithm For Multi-dielectric Capacitance Extraction with Numerical Characterization of Green's Functions,” Proc. ACM/IEEE Asia & South Pacific Design Automation Conference (ASP-DAC), Jan. 2012, pp. 377-382. [paper] (chip interconnect, extraction and modeling, random algorithm, multithreaded programming)

  14. Hao Zhuang, Wenjian Yu, Gang Hu, and Zuochang Ye, “Numerical Characterization of Multi-dielectric Green's Function for Floating Random Walk Based Capacitance Extraction,” Proc. IEEE International Conference on ASIC (ASICON), Oct. 2011, pp. 361-364. [paper] [slides] (chip interconnect, extraction and modeling, random algorithm, field solver)

  15. Gang Hu, Wenjian Yu, Hao Zhuang, and Shan Zeng. “Efficient Floating Random Walk Algorithm for Interconnect Capacitance Extraction Considering Multiple Dielectrics.” Proc. IEEE International Conference on ASIC (ASICON), Oct. 2011, pp. 834-837. (chip interconnect, extraction and modeling, random algorithm, field solver)

  16. Zhiyu Xu, Xinnan Lin, Hao Zhuang, Bo Jiang, Haijun Lou, and Jin He. “A New Nonlinear Parameterized Model Order Reduction Technique Combining the Interpolation Method and Proper Orthogonal Decomposition.” Proc. IEEE International Conference on ASIC (ASICON), 2011 pp. 886-889. (model order reduction, circuit simulation)

  17. Zhiyu Xu, Hao Zhuang, Bo Jiang, Ben Gu, Xinnan Lin, Jin He, Yu Cao, Yang Zhang, Guozeng Wang, Peigang Deng, Xiaojin Zhao, Yang Zhang, Yong Ma, Wen Wu, and Wenping Wang, “An Efficient Iterative Grid Selection Strategy for Time-Mapped Harmonic Balance Method.” NSTI Nanotech 2011, vol. 2., pp. 671-674. (circuit simulation)

Patents

  1. Hao Zhuang and Steven P. McCormick, “Systems and Methods for Transient Simulation of Systems with Linear Components,” Provisional Patent Application filed in July, 2017.

  2. Wenjian Yu, Kuangya Zhai, and Hao Zhuang, “GPU-based system and method for extracting integrated circuit capacitance parameters,” Aug. 12, 2015, Publication number: CN103198177 B

  3. Wenjian Yu and Hao Zhuang, “Method for extracting and calculating capacitance parameter based on random walk in integrated circuit design,” Dec 11, 2013, Publication number: CN102651047 B

Dissertations

  1. Hao Zhuang, “Exponential Time Integration for Transient Analysis of Large-Scale Circuits,” Ph.D. Thesis, Department of Computer Science and Engineering, University of California, San Diego, 2016. [thesis]

  2. Hao Zhuang, “Advanced Floating Random Walk Algorithm for Capacitance Extraction Field Solver of ULSI Interconnects,” M.S. Thesis, School of Electronics Engineering and Computer Science, Peking University, Beijing, China, 2012. [thesis]

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