Hao Zhuang, Ph.D., UCSD Computer Science

alt text 

Research Interests:

My research interest is building efficient computer algorithms and architectures, including

  • Computer architecture and compiler designs, software/hardware co-design, design methodologies and automation for computing systems and accelerators of

    • machine learning, deep learning, neural networks, AI accelerators;

    • computer vision, video codec, video compression, and image processing;

  • Matrix and numerical computing, parallel computing, and high-performance computing (HPC);

  • EDA, VLSI CAD, high-level synthesis, semiconductors, VLSI chip design and automation for data centers and mobile devices;


Graduate Schools:

I got my Ph.D. degree in Computer Science from University of California, San Deigo, CA, USA (UCSD) in 2016 (depth course track - Computer Systems). My graduate research focused on high-performance computing algorithms for EDA and the projects included

  • Numerical algorithms, matrix computation, ordinary differential equantion (ODE) solvers, and stochastic solvers with the applications in

    • The analysis of large-scale nonlinear/linear dynamical systems via exponenital integration. [DAC’15]/[IEEE CASM’16]

    • Fast power grid network simulation via exponenital integrators and its distributed computing paradigm. [DAC’14]

    • Floating random walk algorithms, Monte Carlo sampling, and parallel programming for VLSI network extraction. [IEEE TCAD’13]

    • Physical design in design automation and computer-aided design (EDA/CAD) for building computers and chips. [IEEE TCAD’15]

  • Datapath synthesis, computer architecture, low power design, 3D-ICs (with Qualcomm Research). [ICCCAS’13]

  • Embedded real-time systems and parallel programming language (with UCSD MESL group). [ACM SIGBED Review’17]

My PhD research was funded by Charles Lee Powell Foundation and Qualcomm FMA program. Some of the techniques I developed with my colleagues during both my master and PhD research had been commercialized or purchased into the industry.

I am a regular donator to UCSF Cancer research, UCSD research, and Wikimedia. I encourage people to support the medical development and the distribution of public knowledge. I believe the technologies play the essential role for the education and society, I am also a user of MIT OpenCourseWare. During the spare time of my PhD study, I helped several projects related to online collaboration and personalized e-learning systems to make education massive and accessible to the world. I have worked with linguists, teachers, and professors, used techniques from natural language processing, computational linguistics, and distributed systems.

I got married to Xiao Liu, who can jump way farther than me. She was a national college track and field athlete, and represented China and Peking University for International 2007, 2009 (final 8th place), 2011 Summer Universiade (search using the name “Liu Xiao”). I am a fan of NBA and play basketball games weekly, usually as position 2 on the court.

Selected Publications [Full List] [Google Scholar Citations]

Selected Software Packages [Full List]

  • RWCap: a multi-threaded 3-D floating random walk algorithm based capacitance extraction software (C++) for VLSI interconnect networks. Please check Prof. Wenjian Yu's page at Tsinghua University Numbda group (Numerical Simulation and Big-Data Algorithm) for the latest updates.

Selected Patent [Full List]


  • IEEE student memeber 2011-2016; ACM student memeber and SIAM student memeber 2014-2016.


  • Qualcomm FMA Fellowship (2013-2014): one of the four recipients [award].

  • Charles Lee Powell Fellowship (2012-2015): for supporting outstanding PhD engineering students.

  • Peking University Wu-Si Scholarship (2011).

Academic Experience [Details]

Selected Talks [Full List]

  • “Matrix Exponential Integration in Time-domain Analysis of Circuit Simulation,” at ECE Department, Peking University, China, Oct 2015 [Flyer]

  • “Matrix Exponential Integration in Time-Domain Analysis of Circuit Simulation,” at Department of Electrical and Electronics Engineering, The University of Hong Kong, Hong Kong, Oct. 2015

  • “Algorithms for Dynamic Power Grid Simulation Using Matrix Exponentials,” at ANSYS, Inc., San Jose, Sept. 2015.


Industry [Details]

  • 2018.07-: Google, Mountain View, CA (Software Engineer)

  • 2015.06-2018.07: ANSYS, Inc., San Jose, CA (Senior Software Developer and Tech Lead in ML EDA, reported to the office of CTO)

  • 2014.06-2014.09: Synopsys, Inc., Mountain View, CA, USA (Software Engineering Intern)

  • 2013.06-2014.06: Qualcomm Research & UCSD JSOE, San Diego, CA, USA (FMA Ph.D. Research Fellow)

Some Snapshots

[Google] I am a Software Engineer at Google, Mountain View, CA, working on software, computer architecture, chips and hardware research for mobile, data centers, and AI/Deep Learning/Computer Vision applications.

[ANSYS, Apache] Before Google, I was a Senior Software Developer at ANSYS Semiconductor Business Unit (formerly Apache Design Solutions Inc, a startup acquired by ANSYS) for 3 years since 2015. I worked on Design Automation (EDA/VLSI CAD) research using numerical algorithms, machine Learning, and distributed computing for circuit-level, gate/RTL-level simulation to provide the industrial standard ASIC, VLSI chip power sign-off software. The products have been used over a decade for taping out CPU, GPU, and AI chips. My role was to lead and architect the machine learning-assisted products (for chip timing, dynamic voltage drops, power/EM, and RTL optimizations) in Semiconductor Business Unit on top of the big data distributed system product.

  • To solve challenging machine learning problems in design automation, I worked with Chief Technologiest and Apache co-founder Dr. Norman Chang (UC Berkeley EECS PhD’90). We worked with Nvidia chip design team and Prof. Jang's machine learning lab at National Taiwan University.

It was my privilege to work with the teams consist of legends in the area of design automation research, such as the researcher of AWE, the creators of MIT FastCap, CMU PRIMA, UT RICE, Synopsys PrimeTime, and Apache Redhawk.

[Synopsys] I wroted software at Synopsys Inc as a Summer Intern in 2014, working on graph partitioning algorithm and its multi-threaded programs. The algorithm I help developed in that summer scaled up the matrix solver for full-chip power network analysis with over billion graph nodes.

[Qualcomm Research] While my PhD research, I was also with Qualcomm Research as one of FMA fellows and worked on low-power datapath synthesis, computer architecture, and 3D-ICs.

eXTReMe Tracker